diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/.settings/language.settings.xml b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/.settings/language.settings.xml
index 398f7bb..67d9c0f 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/.settings/language.settings.xml
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/.settings/language.settings.xml
@@ -5,7 +5,7 @@
-
+
@@ -16,7 +16,7 @@
-
+
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/icd.h b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/icd.h
index 5433050..cab630a 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/icd.h
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/icd.h
@@ -9,6 +9,10 @@
#define F412 1
#define MK_TYPE F412
+#define RA_CHANNEL 1
+#define RV_CHANNEL 2
+#define LV_CHANNEL 3
+
#define LAMP false//увеличенное время разряда
#define SPI_MODE false//с фронт энда берём данные
#define ACTIVE_CH 3//с фронт энда берём данные
@@ -28,8 +32,8 @@
// Х*3.3/(4096*(1 + 100000.0/RG)) это сколько вольт у нас
#define MOV_AV_COEF 0.02//коэффициет скользящего среднего
-#define MIN_TRES 0.5
-#define MAX_TRES 3.0
+#define MIN_TRES 2.0
+#define MAX_TRES 10.0
#define DATA_RATE 200
//время для стабилизации сигналов когда ничего не происходит
@@ -76,6 +80,20 @@
#define STANDBY_TIME_MS 10*1000//пусть будет 1 минут
+// минимальное и максимальное кол-во импульсов в пачке
+#define BURST_CNT_MIN 5
+#define BURST_CNT_MAX 50
+
+// минимальное и максимальное напряжение стимуляции в burst режиме
+#define BURST_VOLTAGE_MIN 10
+#define BURST_VOLTAGE_MAX 80
+
+// минимальный и максимальный период следования импульсов в burst режиме
+#define BURST_PERIOD_MIN 150
+#define BURST_PERIOD_MAX 500
+
+#define BURST_PERIOD_MIN_F 150.0
+#define BURST_PERIOD_MAX_F 500.0
#define CHARDE_TONE 120
#define READY_TONE 100
@@ -166,8 +184,14 @@ typedef enum
{
lv_mode_none = 0, //без стимуляции
lv_mode_BURST = 1, //режим для вызова фибрилляции после отработки пачки сбрасывается в lv_mode_none
- lv_mode_VOO = 2, //стимуляция идёт независимо от активности сердца
- lv_mode_VVI = 3 //стимуляция ингибируется при активности сердца
+ lv_mode_VOO = 2, //стимуляция идёт независимо от активности сердца Желудочка
+ lv_mode_VVI = 3//, //стимуляция ингибируется при активности сердца Желудочка
+// lv_mode_VVT = 4, //стимуляция активизируется при активности сердца Желудочка
+// lv_mode_VVIR = 5, //как VVI, но порог чсс зависит отдвигательной активности Желудочка
+// lv_mode_AOO = 6, //стимуляция идёт независимо от активности сердца Предсердия
+// lv_mode_AAI = 7, //стимуляция ингибируется при активности сердца Предсердия
+// lv_mode_AAT = 8, //стимуляция активизируется при активности сердца Предсердия
+// lv_mode_AAIR = 9, //как VVI, но порог чсс зависит отдвигательной активности Предсердия
} lv_mode;
//подрежим низковольтной стимуляции
@@ -234,10 +258,10 @@ typedef struct icd_str
uint8_t lv_voltage;//какое напряжение у импульсов 10-80(1,0-8,0В) одна единица 0,1В шаг 0,1В
//bool BURST_active;//параметр вводящий нас в режим burst посылка пачки импульсов для вызова фибрилляции
- uint8_t BURST_cnt;//сколько импульсов в одной пачке 5-50 одна единица 1 импульс шаг 1 импульс
- uint8_t BURST_voltage;//какое напряжение у импульсов 10-80(1,0-8,0В) одна единица 0,1В шаг 0,1В
- uint16_t BURST_period;//период следования импульсов в мс 150-500мс одна единица 1мс шаг 10 мс на ползунке
-
+ uint8_t burst_cnt;//сколько импульсов в одной пачке 5-50 одна единица 1 импульс шаг 1 импульс
+ uint8_t burst_voltage;//какое напряжение у импульсов 10-80(1,0-8,0В) одна единица 0,1В шаг 0,1В
+ uint16_t burst_period;//период следования импульсов в мс 150-500мс одна единица 1мс шаг 10 мс на ползунке
+ uint16_t burst_end_period;//конечный период следования импульсов в мс 150-500мс одна единица 1мс шаг 10 мс на ползунке
// Время в мс которое длится режим стимуляции низким напряжением
uint16_t lv_mode_time;
@@ -302,16 +326,16 @@ typedef struct icd_str
//новое про высокое напряжение
//режимы стимуляции
- bool hv_sound_accomp;//нужно ли звуковое сопровождение при заряде и ударе
+ bool hv_sound_accomp;//нужно ли звуковое сопровождение при заряде и ударе
hv_polarity hv_polarity;//полярность стимуляции
- hv_mode hv_mode;//тип способа задания длительности импульса
+ hv_mode hv_mode;//тип способа задания длительности импульса
//время константы времени стимуляции
- uint8_t hv_phase_1_duration;// время в десятых мс приходящееся на 1 фазу 30-120(3-12мс) одна единица 0,1мс
- uint8_t hv_phase_2_duration;// время в десятых мс приходящееся на 2 фазу 20-100(2-10мс) одна единица 0,1мс
- uint8_t hv_switch_duration;// время в десятых мс приходящееся на переключение между фазами 10-30(1-3мс) одна единица 0,1мс
+ uint8_t hv_phase_1_duration;// время в десятых мс приходящееся на 1 фазу 30-120(3-12мс) одна единица 0,1мс
+ uint8_t hv_phase_2_duration;// время в десятых мс приходящееся на 2 фазу 20-100(2-10мс) одна единица 0,1мс
+ uint8_t hv_switch_duration;// время в десятых мс приходящееся на переключение между фазами 10-30(1-3мс) одна единица 0,1мс
//процентные параметры стимуляции
- uint8_t hv_switching_voltage;//процент напряжения при котором происходит завешение 1 фазы при адаптивном режиме (20-80) одна единица 1%
- uint8_t hv_cutoff_voltage;//процент напряжения при котором происходит завешение 2 фазы при адаптивном режиме (5-50) одна единица 1%
+ uint8_t hv_switching_voltage;//процент напряжения при котором происходит завешение 1 фазы при адаптивном режиме (20-80) одна единица 1%
+ uint8_t hv_cutoff_voltage;//процент напряжения при котором происходит завешение 2 фазы при адаптивном режиме (5-50) одна единица 1%
uint16_t hv_step_energy;//сколько джоулей в одном шаге считаем в зависимости от минимума и максимума.
uint16_t min_energy;
@@ -384,6 +408,9 @@ void ll_bi_shock_param(icd_str * icd_str);
void ra_lv_control(icd_str * icd_str,lv_sub_mode mode);
void rv_lv_control(icd_str * icd_str,lv_sub_mode mode);
+void one_stimul(icd_str *icd_str);
+void burst(icd_str *icd_str);
+
void hv_en_control(bool en_RV, bool en_SCV, bool en_CAN);
void hv_en_rv(bool state);
void hv_en_scv(bool state);
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/freertos.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/freertos.c
index 7abb033..a24fabc 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/freertos.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/freertos.c
@@ -168,13 +168,14 @@ void StartDefaultTask(void const * argument)
{
if(ICD.lv_start == true)
{
- rv_lv_control(&ICD,lv_sub_charge);
- rv_lv_control(&ICD,lv_sub_shock);
- rv_lv_control(&ICD,lv_sub_relax);
-// rv_lv_control(&ICD,lv_sub_free);
- rv_lv_control(&ICD,lv_sub_discharge);
- ICD.lv_start = false;
-// rv_lv_control(icd_str,lv_sub_free);
+ if(ICD.lv_mode != lv_mode_BURST)
+ {
+ one_stimul(&ICD);
+ }
+ else
+ {
+ burst(&ICD);
+ }
}
osDelay(5);
}
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/gpio.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/gpio.c
index 3b00fef..2ffb17d 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/gpio.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/gpio.c
@@ -61,9 +61,6 @@ void MX_GPIO_Init(void)
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOE, V12_PWR_Pin|HV_LOGIC_PWR_Pin|RV_LV_DIS_Pin, GPIO_PIN_SET);
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(RA_LV_SHOCK_GPIO_Port, RA_LV_SHOCK_Pin, GPIO_PIN_SET);
-
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, RA_LV_DIS_Pin|HV_EN_RV_Pin, GPIO_PIN_SET);
@@ -114,13 +111,6 @@ void MX_GPIO_Init(void)
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- /*Configure GPIO pin : PtPin */
- GPIO_InitStruct.Pin = RA_LV_SHOCK_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(RA_LV_SHOCK_GPIO_Port, &GPIO_InitStruct);
-
/*Configure GPIO pins : PBPin PBPin PBPin PBPin
PBPin PBPin PBPin PBPin */
GPIO_InitStruct.Pin = RA_LV_DIS_Pin|RA_LV_COIL_TO_GND_Pin|RA_LV_TIP_TO_GND_Pin|CAN_LV_TO_GND_Pin
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/icd.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/icd.c
index d631e91..49e359b 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/icd.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/icd.c
@@ -7,6 +7,7 @@
#endif
extern TIM_HandleTypeDef htim11;
+extern TIM_HandleTypeDef htim14;
icd_str ICD;
extern adc_struct adc_str;//структура ацп
@@ -58,10 +59,10 @@ void init_icd(icd_str * icd_str)
icd_str->lv_voltage = 35;//какое напряжение у импульсов 10-80(1,0-8,0В) одна единица 0,1В шаг 0,1В
//bool BURST_active;//параметр вводящий нас в режим burst посылка пачки импульсов для вызова фибрилляции
- icd_str->BURST_cnt = 33;//сколько импульсов в одной пачке 5-50 одна единица 1 импульс шаг 1 импульс
- icd_str->BURST_voltage =34;//какое напряжение у импульсов 10-80(1,0-8,0В) одна единица 0,1В шаг 0,1В
- icd_str->BURST_period = 333;//период следования импульсов в мс 150-500мс одна единица 1мс шаг 10 мс на ползунке
-
+ icd_str->burst_cnt = 33;//сколько импульсов в одной пачке 5-50 одна единица 1 импульс шаг 1 импульс
+ icd_str->burst_voltage = 34;//какое напряжение у импульсов 10-80(1,0-8,0В) одна единица 0,1В шаг 0,1В
+ icd_str->burst_period = 500;//период следования импульсов в мс 150-500мс одна единица 1мс шаг 10 мс на ползунке
+ icd_str->burst_end_period = 300;//период следования импульсов в конце стимуляции в мс 150-500мс одна единица 1мс шаг 10 мс на ползунке
// тип последнего определённого события
@@ -112,7 +113,7 @@ void init_icd(icd_str * icd_str)
icd_str->hv_step_number = HV_STEP_NUM;//сколько шагов ВВ терапии?
icd_str->hv_step_cnt = 0;// какой сейчас шаг?
- icd_str->hv_polarity = rv_neg_scv_poz; //полярность стимуляции
+ icd_str->hv_polarity = rv_neg_can_poz; //полярность стимуляции
icd_str->hv_mode = hv_mode_fixed; //тип способа задания длительности импульса
//время константы времени стимуляции
icd_str->hv_phase_1_duration = 100; // время в десятых мс приходящееся на 1 фазу 30-120(3-12мс) одна единица 0,1мс
@@ -134,6 +135,11 @@ void init_icd(icd_str * icd_str)
icd_str->spi_pot_set = 6;
}
+//статические функции
+void first_phase(hv_polarity polarity);
+void second_phase(hv_polarity polarity);
+
+
float my_abs(float a)
{
return (a<0)? -a:a;
@@ -542,6 +548,7 @@ void hv_charge(icd_str *icd_str)
uint16_t voltage_i = (uint16_t) (voltage * 10.2);//умножаем на 10.2 а не на 10 т.к. напряжение после выключения заряда слегка просаживается.
while (i < 80)
{
+// тут были попытки менять в динамике заполнение шим, но никак не помогло.
// if (adc_str.hv_volt > 3500)
// {
// TIM1->CCR4 = 50;
@@ -825,8 +832,8 @@ void hv_ll_rv_control(half_br state)
//Замкнут нижний ключ
if(state == low)
{
- HAL_GPIO_WritePin(HV_LS_RV_GPIO_Port, HV_LS_RV_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(HV_HS_RV_GPIO_Port, HV_HS_RV_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(HV_LS_RV_GPIO_Port, HV_LS_RV_Pin, GPIO_PIN_SET);
}
//Замкнут верхний ключ
else if (state == high)
@@ -848,8 +855,8 @@ void hv_ll_scv_control(half_br state)
//Замкнут нижний ключ
if(state == low)
{
- HAL_GPIO_WritePin(HV_LS_SCV_GPIO_Port, HV_LS_SCV_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(HV_HS_SCV_GPIO_Port, HV_HS_SCV_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(HV_LS_SCV_GPIO_Port, HV_LS_SCV_Pin, GPIO_PIN_SET);
}
//Замкнут верхний ключ
else if (state == high)
@@ -871,8 +878,8 @@ void hv_ll_can_control(half_br state)
//Замкнут нижний ключ
if(state == low)
{
- HAL_GPIO_WritePin(HV_LS_CAN_GPIO_Port, HV_LS_CAN_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(HV_HS_CAN_GPIO_Port, HV_HS_CAN_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(HV_LS_CAN_GPIO_Port, HV_LS_CAN_Pin, GPIO_PIN_SET);
}
//Замкнут верхний ключ
else if (state == high)
@@ -904,6 +911,58 @@ void hv_discharge(bool state)
}
}
+
+
+void first_phase(hv_polarity polarity)
+{
+ switch (polarity)
+ {
+ // Электрод RV отрицательный SCV положительный
+ case rv_neg_scv_poz:
+ {
+ hv_ll_control(low, high, z_state);
+ }
+ break;
+ // Электрод RV отрицательный корпус прибора положительный
+ case rv_neg_can_poz:
+ {
+ hv_ll_control(low, z_state, high);
+ }
+ break;
+ // Электрод RV отрицательный SCV и корпус прибора положительный
+ case rv_neg_scv_can_poz:
+ {
+ hv_ll_control(low, high, high);
+ }
+ break;
+ }
+}
+
+void second_phase(hv_polarity polarity)
+{
+ switch (polarity)
+ {
+ // Электрод RV отрицательный SCV положительный
+ case rv_neg_scv_poz:
+ {
+ hv_ll_control(high, low, z_state);
+ }
+ break;
+ // Электрод RV отрицательный корпус прибора положительный
+ case rv_neg_can_poz:
+ {
+ hv_ll_control(high, z_state, low);
+ }
+ break;
+ // Электрод RV отрицательный SCV и корпус прибора положительный
+ case rv_neg_scv_can_poz:
+ {
+ hv_ll_control(high, low, low);
+ }
+ break;
+ }
+}
+
////разряд биполярный с выбором параметров
void ll_bi_shock_param(icd_str * icd_str)
{
@@ -936,19 +995,16 @@ void ll_bi_shock_param(icd_str * icd_str)
hv_en_control(true,true,false);
osDelay(2);//временно
- //первая волна
- hv_ll_control(low, high, z_state);
+ //первая фаза
+ first_phase(polarity);
delay_critical(hv_phase_1_duration);
- // osDelay(2);//временно
//остановка
//чтобы не пробило перевели в разамкнутое состояние все полумосты
hv_ll_control(z_state, z_state, z_state);
delay_critical(hv_switch_duration);
- // osDelay(2);//временно
- //вторая волна
- hv_ll_control(high, low, z_state);
+ //вторая фаза
+ second_phase(polarity);
delay_critical(hv_phase_2_duration);
- // osDelay(2);
//отключение
hv_ll_control(z_state, z_state, z_state);
hv_en_control(false,false,false);
@@ -972,7 +1028,6 @@ void ra_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RA_LV_TIP_TO_GND_GPIO_Port, RA_LV_TIP_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RA_LV_COIL_TO_GND_GPIO_Port, RA_LV_COIL_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RA_LV_DIS_GPIO_Port, RA_LV_DIS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(RA_LV_SHOCK_GPIO_Port, RA_LV_SHOCK_Pin, GPIO_PIN_SET);
}
break;
//Заряд без всякого вмешательства tip и coil идёт заряд
@@ -981,12 +1036,12 @@ void ra_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RA_LV_TIP_TO_GND_GPIO_Port, RA_LV_TIP_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RA_LV_COIL_TO_GND_GPIO_Port, RA_LV_COIL_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RA_LV_DIS_GPIO_Port, RA_LV_DIS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(RA_LV_SHOCK_GPIO_Port, RA_LV_SHOCK_Pin, GPIO_PIN_SET);
-
+ osDelay(2);
TIM4->CCR1 = 500;
TIM4->CCR2 = 500;
TIM4->CCR3 = 500;
- osDelay(2);
+ uint32_t charge_time = (uint32_t) (icd_str->lv_voltage);
+ osDelay(charge_time/5);
TIM4->CCR1 = 0;
TIM4->CCR2 = 0;
TIM4->CCR3 = 0;
@@ -997,10 +1052,13 @@ void ra_lv_control(icd_str * icd_str,lv_sub_mode mode)
{
HAL_GPIO_WritePin(RA_LV_TIP_TO_GND_GPIO_Port, RA_LV_TIP_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RA_LV_COIL_TO_GND_GPIO_Port, RA_LV_COIL_TO_GND_Pin, GPIO_PIN_SET);
+// HAL_GPIO_WritePin(RA_LV_COIL_TO_GND_GPIO_Port, RA_LV_COIL_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RA_LV_DIS_GPIO_Port, RA_LV_DIS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(RA_LV_SHOCK_GPIO_Port, RA_LV_SHOCK_Pin, GPIO_PIN_RESET);
- osDelay(1);
- HAL_GPIO_WritePin(RA_LV_SHOCK_GPIO_Port, RA_LV_SHOCK_Pin, GPIO_PIN_SET);
+ osDelay(2);
+ uint32_t shock_time = (uint32_t) (icd_str->lv_shock_time);
+ __HAL_TIM_SET_COUNTER(&htim14, 0);
+ __HAL_TIM_SET_COMPARE(&htim14, TIM_CHANNEL_1, 30-shock_time); //установка задержки перед импульсом
+ TIM14->CR1 |= TIM_CR1_CEN;
}
break;
//Релаксация tip и coil притянуты к земле
@@ -1009,8 +1067,6 @@ void ra_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RA_LV_TIP_TO_GND_GPIO_Port, RA_LV_TIP_TO_GND_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(RA_LV_COIL_TO_GND_GPIO_Port, RA_LV_COIL_TO_GND_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(RA_LV_DIS_GPIO_Port, RA_LV_DIS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(RA_LV_SHOCK_GPIO_Port, RA_LV_SHOCK_Pin, GPIO_PIN_SET);
- osDelay(20);
}
break;
//Разряд без всякого вмешательства tip и coil свободны идёт разряд(необязательный режим)
@@ -1019,7 +1075,6 @@ void ra_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RA_LV_TIP_TO_GND_GPIO_Port, RA_LV_TIP_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RA_LV_COIL_TO_GND_GPIO_Port, RA_LV_COIL_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RA_LV_DIS_GPIO_Port, RA_LV_DIS_Pin, GPIO_PIN_RESET);
- HAL_GPIO_WritePin(RA_LV_SHOCK_GPIO_Port, RA_LV_SHOCK_Pin, GPIO_PIN_SET);
}
break;
}
@@ -1048,7 +1103,7 @@ void rv_lv_control(icd_str * icd_str,lv_sub_mode mode)
TIM2->CCR3 = 500;
TIM2->CCR4 = 500;
uint32_t charge_time = (uint32_t) (icd_str->lv_voltage);
- osDelay(charge_time/10);
+ osDelay(charge_time/5);
TIM2->CCR2 = 0;
TIM2->CCR3 = 0;
TIM2->CCR4 = 0;
@@ -1073,7 +1128,6 @@ void rv_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RV_LV_TIP_TO_GND_GPIO_Port, RV_LV_TIP_TO_GND_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(RV_LV_COIL_TO_GND_GPIO_Port, RV_LV_COIL_TO_GND_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(RV_LV_DIS_GPIO_Port, RV_LV_DIS_Pin, GPIO_PIN_SET);
- osDelay(20);
}
break;
//Разряд без всякого вмешательства tip и coil свободны идёт разряд(необязательный режим)
@@ -1087,6 +1141,77 @@ void rv_lv_control(icd_str * icd_str,lv_sub_mode mode)
}
}
+void one_stimul(icd_str *icd_str)
+{
+ //сперва тупо парсим параметры из основной структуры
+ //хватаем параметры в локальные переменные чтобы ничего не поменялось
+ uint8_t active_ch = icd_str->active_ch;
+
+ if (active_ch == RV_CHANNEL)
+ {
+ rv_lv_control(&ICD, lv_sub_charge);
+ rv_lv_control(&ICD, lv_sub_shock);
+ rv_lv_control(&ICD, lv_sub_relax);
+ rv_lv_control(&ICD, lv_sub_discharge);
+ }
+ else if (active_ch == RA_CHANNEL)
+ {
+ ra_lv_control(&ICD, lv_sub_charge);
+ ra_lv_control(&ICD, lv_sub_shock);
+ ra_lv_control(&ICD, lv_sub_relax);
+ ra_lv_control(&ICD, lv_sub_discharge);
+ }
+
+ icd_str->lv_start = false;
+}
+
+
+void burst(icd_str *icd_str)
+{
+ //сперва тупо парсим параметры из основной структуры
+ //хватаем параметры в локальные переменные чтобы ничего не поменялось
+ uint8_t active_ch = icd_str->active_ch;
+ uint8_t burst_cnt = icd_str->burst_cnt;
+ float burst_start_period = (float) icd_str->burst_period;
+ float burst_end_period = (float) icd_str->burst_end_period;
+ float burst_now_period = burst_start_period;
+ float burst_step = (burst_end_period - burst_start_period) / ((float) (burst_cnt-1));
+
+ uint8_t i = 0;
+
+ while (i < burst_cnt)
+ {
+ if (active_ch == RV_CHANNEL)
+ {
+ rv_lv_control(&ICD, lv_sub_charge);
+ rv_lv_control(&ICD, lv_sub_shock);
+ rv_lv_control(&ICD, lv_sub_relax);
+ rv_lv_control(&ICD, lv_sub_discharge);
+ }
+ else if (active_ch == RA_CHANNEL)
+ {
+ ra_lv_control(&ICD, lv_sub_charge);
+ ra_lv_control(&ICD, lv_sub_shock);
+ ra_lv_control(&ICD, lv_sub_relax);
+ ra_lv_control(&ICD, lv_sub_discharge);
+ }
+// тут криво работает период не меняет
+// burst_now_period = burst_start_period + burst_step * (float) (i);
+// fixme try this!!
+ burst_now_period += burst_step;
+ if (burst_now_period > BURST_PERIOD_MAX_F)
+ osDelay(BURST_PERIOD_MAX);
+ else if (burst_now_period < BURST_PERIOD_MIN_F)
+ osDelay(BURST_PERIOD_MIN);
+ else
+ osDelay((uint32_t) burst_now_period);
+ i++;
+ }
+
+ icd_str->lv_mode = lv_mode_none;
+ icd_str->lv_start = false;
+}
+
//единое управление enable пинами
void hv_en_control(bool en_RV, bool en_SCV, bool en_CAN)
{
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/main.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/main.c
index 9e5a12a..f74f1f9 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/main.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/main.c
@@ -141,9 +141,10 @@ int main(void)
// Таймер Звука
HAL_TIM_PWM_Start(&htim9, TIM_CHANNEL_2);
-// fixme добавить ещё таймеров
+ //таймер RV стимул
HAL_TIM_OnePulse_Start(&htim11, TIM_CHANNEL_1);
-
+ //таймер RA стимул
+ HAL_TIM_OnePulse_Start(&htim14, TIM_CHANNEL_1);
//Включили питание АЦП
HAL_GPIO_WritePin(INA_PWR_GPIO_Port, INA_PWR_Pin, SET);
HAL_GPIO_WritePin(DOP_PWR_GPIO_Port, DOP_PWR_Pin, SET);
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/parse.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/parse.c
index fdd835d..6dfeadd 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/parse.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/parse.c
@@ -503,9 +503,9 @@ void parse_command(uint8_t* buf, icd_str * icd_str)
case 0x27:
{
uint8_t idata = unpackUint8(&buf[2]);
- if (check_uint8(idata, 5, 50))
+ if (check_uint8(idata, BURST_CNT_MIN, BURST_CNT_MAX))
{
- icd_str->BURST_cnt = idata;
+ icd_str->burst_cnt = idata;
}
}
break;
@@ -513,9 +513,9 @@ void parse_command(uint8_t* buf, icd_str * icd_str)
case 0x28:
{
uint8_t idata = unpackUint8(&buf[2]);
- if (check_uint8(idata, 10, 80))
+ if (check_uint8(idata, BURST_VOLTAGE_MIN, BURST_VOLTAGE_MAX))
{
- icd_str->BURST_voltage = idata;
+ icd_str->burst_voltage = idata;
}
}
break;
@@ -523,9 +523,9 @@ void parse_command(uint8_t* buf, icd_str * icd_str)
case 0x29:
{
uint32_t idata = unpackUint32(&buf[2]);
- if (check_uint16(idata, 150, 500))
+ if (check_uint16(idata, BURST_PERIOD_MIN, BURST_PERIOD_MAX))
{
- icd_str->BURST_period = idata;
+ icd_str->burst_period = idata;
}
}
break;
@@ -599,6 +599,16 @@ void parse_command(uint8_t* buf, icd_str * icd_str)
{
icd_str->hv_cutoff_voltage = idata;
}
+ }
+ break;
+ //период следования импульсов в мс 150-500мс одна единица 1мс шаг 10 мс на ползунке
+ case 0x37:
+ {
+ uint32_t idata = unpackUint32(&buf[2]);
+ if (check_uint16(idata, BURST_PERIOD_MIN, BURST_PERIOD_MAX))
+ {
+ icd_str->burst_end_period = idata;
+ }
}
break;
default:
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/tim.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/tim.c
index 45a0a86..5700b26 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/tim.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/tim.c
@@ -434,22 +434,41 @@ void MX_TIM14_Init(void)
/* USER CODE END TIM14_Init 0 */
+ TIM_OC_InitTypeDef sConfigOC = {0};
+
/* USER CODE BEGIN TIM14_Init 1 */
/* USER CODE END TIM14_Init 1 */
htim14.Instance = TIM14;
- htim14.Init.Prescaler = 0;
+ htim14.Init.Prescaler = 2399;
htim14.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim14.Init.Period = 65535;
+ htim14.Init.Period = 29;
htim14.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim14.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim14) != HAL_OK)
{
Error_Handler();
}
+ if (HAL_TIM_PWM_Init(&htim14) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_TIM_OnePulse_Init(&htim14, TIM_OPMODE_SINGLE) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sConfigOC.OCMode = TIM_OCMODE_PWM2;
+ sConfigOC.Pulse = 0;
+ sConfigOC.OCPolarity = TIM_OCPOLARITY_LOW;
+ sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ if (HAL_TIM_PWM_ConfigChannel(&htim14, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ {
+ Error_Handler();
+ }
/* USER CODE BEGIN TIM14_Init 2 */
/* USER CODE END TIM14_Init 2 */
+ HAL_TIM_MspPostInit(&htim14);
}
@@ -694,6 +713,27 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
/* USER CODE END TIM11_MspPostInit 1 */
}
+ else if(timHandle->Instance==TIM14)
+ {
+ /* USER CODE BEGIN TIM14_MspPostInit 0 */
+
+ /* USER CODE END TIM14_MspPostInit 0 */
+
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**TIM14 GPIO Configuration
+ PA7 ------> TIM14_CH1
+ */
+ GPIO_InitStruct.Pin = RA_LV_SHOCK_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
+ GPIO_InitStruct.Alternate = GPIO_AF9_TIM14;
+ HAL_GPIO_Init(RA_LV_SHOCK_GPIO_Port, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN TIM14_MspPostInit 1 */
+
+ /* USER CODE END TIM14_MspPostInit 1 */
+ }
}
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/usart.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/usart.c
index 380178c..c513f98 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/usart.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/usart.c
@@ -441,11 +441,11 @@ void ble_HEX_new(ctrl_struct *control, icd_str *icd_str, adc_struct *adc, bool s
TX_BUF[24] = ((icd_str->lv_shock_time) & 0xFF); //время импульса низковольной стимуляции 1-20(0,1-2мс) одна единица 0,1мс шаг 0.1мс
TX_BUF[25] = ((icd_str->lv_relax_time) & 0xFF); //время стабилизации после удара низковольной стимуляции 0-20(0-20мс) одна единица 1мс шаг 1мс
TX_BUF[26] = ((icd_str->lv_voltage) & 0xFF); //какое напряжение у импульсов 10-80(1,0-8,0В) одна единица 0,1В шаг 0,1В
- TX_BUF[27] = ((icd_str->BURST_cnt) & 0xFF); //сколько импульсов в одной пачке 5-50 одна единица 1 импульс шаг 1 импульс
- TX_BUF[28] = ((icd_str->BURST_voltage) & 0xFF); //какое напряжение у импульсов 10-80(1,0-8,0В) одна единица 0,1В шаг 0,1В
+ TX_BUF[27] = ((icd_str->burst_cnt) & 0xFF); //сколько импульсов в одной пачке 5-50 одна единица 1 импульс шаг 1 импульс
+ TX_BUF[28] = ((icd_str->burst_voltage) & 0xFF); //какое напряжение у импульсов 10-80(1,0-8,0В) одна единица 0,1В шаг 0,1В
//период следования импульсов в мс 150-500мс одна единица 1мс шаг 10 мс на ползунке
- TX_BUF[29] = ((icd_str->BURST_period) >> 8) & 0xFF;
- TX_BUF[30] = ((icd_str->BURST_period) & 0xFF);
+ TX_BUF[29] = ((icd_str->burst_period) >> 8) & 0xFF;
+ TX_BUF[30] = ((icd_str->burst_period) & 0xFF);
}
else if (icd_str->counter % 12 == 11)
@@ -457,6 +457,9 @@ void ble_HEX_new(ctrl_struct *control, icd_str *icd_str, adc_struct *adc, bool s
TX_BUF[26] = ((icd_str->hv_switch_duration) & 0xFF);// время в десятых мс приходящееся на переключение между фазами 10-30(1-3мс) одна единица 0,1мс
TX_BUF[27] = ((icd_str->hv_switching_voltage) & 0xFF);//процент напряжения при котором происходит завешение 1 фазы при адаптивном режиме (20-80) одна единица 1%
TX_BUF[28] = ((icd_str->hv_cutoff_voltage) & 0xFF); //процент напряжения при котором происходит завешение 2 фазы при адаптивном режиме (5-50) одна единица 1%
+ //период следования импульсов в мс 150-500мс одна единица 1мс шаг 10 мс на ползунке
+ TX_BUF[29] = ((icd_str->burst_end_period) >> 8) & 0xFF;
+ TX_BUF[30] = ((icd_str->burst_end_period) & 0xFF);
}
TX_BUF[31] = 0x77; //конечный байт
//данные шлём не всегда.
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.cyclo
index 9a0fec5..83dbfb8 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.cyclo
@@ -1,7 +1,7 @@
../Core/Src/freertos.c:94:6:vApplicationGetIdleTaskMemory 1
../Core/Src/freertos.c:108:6:MX_FREERTOS_Init 1
-../Core/Src/freertos.c:163:6:StartDefaultTask 2
-../Core/Src/freertos.c:191:6:StartOprosTask 6
-../Core/Src/freertos.c:229:6:StartControlTask 1
-../Core/Src/freertos.c:248:6:StartLowSpeedTask 2
-../Core/Src/freertos.c:276:6:StartButTask 5
+../Core/Src/freertos.c:163:6:StartDefaultTask 3
+../Core/Src/freertos.c:192:6:StartOprosTask 6
+../Core/Src/freertos.c:230:6:StartControlTask 1
+../Core/Src/freertos.c:249:6:StartLowSpeedTask 2
+../Core/Src/freertos.c:277:6:StartButTask 5
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.o
index 64fbf64..2f76658 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.su b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.su
index 836d7be..9d27baa 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.su
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.su
@@ -1,7 +1,7 @@
../Core/Src/freertos.c:94:6:vApplicationGetIdleTaskMemory 24 static
../Core/Src/freertos.c:108:6:MX_FREERTOS_Init 160 static
../Core/Src/freertos.c:163:6:StartDefaultTask 16 static
-../Core/Src/freertos.c:191:6:StartOprosTask 16 static
-../Core/Src/freertos.c:229:6:StartControlTask 16 static
-../Core/Src/freertos.c:248:6:StartLowSpeedTask 24 static
-../Core/Src/freertos.c:276:6:StartButTask 16 static
+../Core/Src/freertos.c:192:6:StartOprosTask 16 static
+../Core/Src/freertos.c:230:6:StartControlTask 16 static
+../Core/Src/freertos.c:249:6:StartLowSpeedTask 24 static
+../Core/Src/freertos.c:277:6:StartButTask 16 static
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/gpio.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/gpio.o
index 428464c..840999c 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/gpio.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/gpio.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.cyclo
index 8c3bfdf..fba7c52 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.cyclo
@@ -1,36 +1,40 @@
-../Core/Src/icd.c:13:6:init_icd 1
-../Core/Src/icd.c:137:7:my_abs 2
-../Core/Src/icd.c:143:6:mode_start 2
-../Core/Src/icd.c:155:6:get_data 2
-../Core/Src/icd.c:169:6:get_data_max30003 1
-../Core/Src/icd.c:180:6:check_mode_len 4
-../Core/Src/icd.c:210:6:check_tres 11
-../Core/Src/icd.c:260:6:search_alg 27
-../Core/Src/icd.c:397:10:moving_avarage 3
-../Core/Src/icd.c:416:6:basket_alg 8
-../Core/Src/icd.c:456:6:terapy_start 2
-../Core/Src/icd.c:467:6:hv_pwm 2
-../Core/Src/icd.c:486:6:hv_sound 2
-../Core/Src/icd.c:503:6:hv_charge 5
-../Core/Src/icd.c:569:6:hv_shock 2
-../Core/Src/icd.c:595:6:quick_analyse 4
-../Core/Src/icd.c:635:6:fibr_terapy 6
-../Core/Src/icd.c:707:6:terapy_algorithm 9
-../Core/Src/icd.c:767:6:relay_all_control 1
-../Core/Src/icd.c:774:6:relay_ra_control 2
-../Core/Src/icd.c:783:6:relay_rv_control 2
-../Core/Src/icd.c:791:6:relay_can_control 2
-../Core/Src/icd.c:800:6:hv_ll_control 1
-../Core/Src/icd.c:808:6:hv_power 2
-../Core/Src/icd.c:823:6:hv_ll_rv_control 3
-../Core/Src/icd.c:846:6:hv_ll_scv_control 3
-../Core/Src/icd.c:869:6:hv_ll_can_control 3
-../Core/Src/icd.c:893:6:hv_discharge 2
-../Core/Src/icd.c:908:6:ll_bi_shock_param 2
-../Core/Src/icd.c:965:6:ra_lv_control 6
-../Core/Src/icd.c:1028:6:rv_lv_control 6
-../Core/Src/icd.c:1091:6:hv_en_control 1
-../Core/Src/icd.c:1099:6:hv_en_rv 2
-../Core/Src/icd.c:1107:6:hv_en_scv 2
-../Core/Src/icd.c:1115:6:hv_en_can 2
-../Core/Src/icd.c:1123:6:delay_critical 1
+../Core/Src/icd.c:14:6:init_icd 1
+../Core/Src/icd.c:143:7:my_abs 2
+../Core/Src/icd.c:149:6:mode_start 2
+../Core/Src/icd.c:161:6:get_data 2
+../Core/Src/icd.c:175:6:get_data_max30003 1
+../Core/Src/icd.c:186:6:check_mode_len 4
+../Core/Src/icd.c:216:6:check_tres 11
+../Core/Src/icd.c:266:6:search_alg 27
+../Core/Src/icd.c:403:10:moving_avarage 3
+../Core/Src/icd.c:422:6:basket_alg 8
+../Core/Src/icd.c:462:6:terapy_start 2
+../Core/Src/icd.c:473:6:hv_pwm 2
+../Core/Src/icd.c:492:6:hv_sound 2
+../Core/Src/icd.c:509:6:hv_charge 5
+../Core/Src/icd.c:576:6:hv_shock 2
+../Core/Src/icd.c:602:6:quick_analyse 4
+../Core/Src/icd.c:642:6:fibr_terapy 6
+../Core/Src/icd.c:714:6:terapy_algorithm 9
+../Core/Src/icd.c:774:6:relay_all_control 1
+../Core/Src/icd.c:781:6:relay_ra_control 2
+../Core/Src/icd.c:790:6:relay_rv_control 2
+../Core/Src/icd.c:798:6:relay_can_control 2
+../Core/Src/icd.c:807:6:hv_ll_control 1
+../Core/Src/icd.c:815:6:hv_power 2
+../Core/Src/icd.c:830:6:hv_ll_rv_control 3
+../Core/Src/icd.c:853:6:hv_ll_scv_control 3
+../Core/Src/icd.c:876:6:hv_ll_can_control 3
+../Core/Src/icd.c:900:6:hv_discharge 2
+../Core/Src/icd.c:916:6:first_phase 5
+../Core/Src/icd.c:941:6:second_phase 5
+../Core/Src/icd.c:967:6:ll_bi_shock_param 2
+../Core/Src/icd.c:1021:6:ra_lv_control 6
+../Core/Src/icd.c:1083:6:rv_lv_control 6
+../Core/Src/icd.c:1144:6:one_stimul 3
+../Core/Src/icd.c:1169:6:burst 6
+../Core/Src/icd.c:1216:6:hv_en_control 1
+../Core/Src/icd.c:1224:6:hv_en_rv 2
+../Core/Src/icd.c:1232:6:hv_en_scv 2
+../Core/Src/icd.c:1240:6:hv_en_can 2
+../Core/Src/icd.c:1248:6:delay_critical 1
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.o
index 35d1dc9..d0d8fe7 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.su b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.su
index 10b83bf..57dec96 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.su
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.su
@@ -1,36 +1,40 @@
-../Core/Src/icd.c:13:6:init_icd 16 static
-../Core/Src/icd.c:137:7:my_abs 16 static
-../Core/Src/icd.c:143:6:mode_start 16 static
-../Core/Src/icd.c:155:6:get_data 32 static
-../Core/Src/icd.c:169:6:get_data_max30003 32 static
-../Core/Src/icd.c:180:6:check_mode_len 16 static
-../Core/Src/icd.c:210:6:check_tres 16 static
-../Core/Src/icd.c:260:6:search_alg 16 static
-../Core/Src/icd.c:397:10:moving_avarage 24 static
-../Core/Src/icd.c:416:6:basket_alg 16 static
-../Core/Src/icd.c:456:6:terapy_start 16 static
-../Core/Src/icd.c:467:6:hv_pwm 16 static
-../Core/Src/icd.c:486:6:hv_sound 16 static
-../Core/Src/icd.c:503:6:hv_charge 32 static
-../Core/Src/icd.c:569:6:hv_shock 16 static
-../Core/Src/icd.c:595:6:quick_analyse 16 static
-../Core/Src/icd.c:635:6:fibr_terapy 16 static
-../Core/Src/icd.c:707:6:terapy_algorithm 16 static
-../Core/Src/icd.c:767:6:relay_all_control 16 static
-../Core/Src/icd.c:774:6:relay_ra_control 16 static
-../Core/Src/icd.c:783:6:relay_rv_control 16 static
-../Core/Src/icd.c:791:6:relay_can_control 16 static
-../Core/Src/icd.c:800:6:hv_ll_control 16 static
-../Core/Src/icd.c:808:6:hv_power 16 static
-../Core/Src/icd.c:823:6:hv_ll_rv_control 16 static
-../Core/Src/icd.c:846:6:hv_ll_scv_control 16 static
-../Core/Src/icd.c:869:6:hv_ll_can_control 16 static
-../Core/Src/icd.c:893:6:hv_discharge 16 static
-../Core/Src/icd.c:908:6:ll_bi_shock_param 24 static
-../Core/Src/icd.c:965:6:ra_lv_control 16 static
-../Core/Src/icd.c:1028:6:rv_lv_control 24 static
-../Core/Src/icd.c:1091:6:hv_en_control 16 static
-../Core/Src/icd.c:1099:6:hv_en_rv 16 static
-../Core/Src/icd.c:1107:6:hv_en_scv 16 static
-../Core/Src/icd.c:1115:6:hv_en_can 16 static
-../Core/Src/icd.c:1123:6:delay_critical 24 static
+../Core/Src/icd.c:14:6:init_icd 16 static
+../Core/Src/icd.c:143:7:my_abs 16 static
+../Core/Src/icd.c:149:6:mode_start 16 static
+../Core/Src/icd.c:161:6:get_data 32 static
+../Core/Src/icd.c:175:6:get_data_max30003 32 static
+../Core/Src/icd.c:186:6:check_mode_len 16 static
+../Core/Src/icd.c:216:6:check_tres 16 static
+../Core/Src/icd.c:266:6:search_alg 16 static
+../Core/Src/icd.c:403:10:moving_avarage 24 static
+../Core/Src/icd.c:422:6:basket_alg 16 static
+../Core/Src/icd.c:462:6:terapy_start 16 static
+../Core/Src/icd.c:473:6:hv_pwm 16 static
+../Core/Src/icd.c:492:6:hv_sound 16 static
+../Core/Src/icd.c:509:6:hv_charge 32 static
+../Core/Src/icd.c:576:6:hv_shock 16 static
+../Core/Src/icd.c:602:6:quick_analyse 16 static
+../Core/Src/icd.c:642:6:fibr_terapy 16 static
+../Core/Src/icd.c:714:6:terapy_algorithm 16 static
+../Core/Src/icd.c:774:6:relay_all_control 16 static
+../Core/Src/icd.c:781:6:relay_ra_control 16 static
+../Core/Src/icd.c:790:6:relay_rv_control 16 static
+../Core/Src/icd.c:798:6:relay_can_control 16 static
+../Core/Src/icd.c:807:6:hv_ll_control 16 static
+../Core/Src/icd.c:815:6:hv_power 16 static
+../Core/Src/icd.c:830:6:hv_ll_rv_control 16 static
+../Core/Src/icd.c:853:6:hv_ll_scv_control 16 static
+../Core/Src/icd.c:876:6:hv_ll_can_control 16 static
+../Core/Src/icd.c:900:6:hv_discharge 16 static
+../Core/Src/icd.c:916:6:first_phase 16 static
+../Core/Src/icd.c:941:6:second_phase 16 static
+../Core/Src/icd.c:967:6:ll_bi_shock_param 24 static
+../Core/Src/icd.c:1021:6:ra_lv_control 24 static
+../Core/Src/icd.c:1083:6:rv_lv_control 24 static
+../Core/Src/icd.c:1144:6:one_stimul 24 static
+../Core/Src/icd.c:1169:6:burst 40 static
+../Core/Src/icd.c:1216:6:hv_en_control 16 static
+../Core/Src/icd.c:1224:6:hv_en_rv 16 static
+../Core/Src/icd.c:1232:6:hv_en_scv 16 static
+../Core/Src/icd.c:1240:6:hv_en_can 16 static
+../Core/Src/icd.c:1248:6:delay_critical 24 static
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.cyclo
index cb91597..69b6150 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.cyclo
@@ -1,5 +1,5 @@
../Core/Src/main.c:72:5:main 1
-../Core/Src/main.c:176:6:SystemClock_Config 3
-../Core/Src/main.c:230:6:HAL_TIM_PeriodElapsedCallback 2
-../Core/Src/main.c:247:6:Error_Handler 1
-../Core/Src/main.c:266:6:assert_failed 1
+../Core/Src/main.c:177:6:SystemClock_Config 3
+../Core/Src/main.c:231:6:HAL_TIM_PeriodElapsedCallback 2
+../Core/Src/main.c:248:6:Error_Handler 1
+../Core/Src/main.c:267:6:assert_failed 1
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.o
index 4207cb1..82ed32b 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.su b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.su
index 4a1a880..f83b522 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.su
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.su
@@ -1,5 +1,5 @@
../Core/Src/main.c:72:5:main 8 static
-../Core/Src/main.c:176:6:SystemClock_Config 88 static
-../Core/Src/main.c:230:6:HAL_TIM_PeriodElapsedCallback 16 static
-../Core/Src/main.c:247:6:Error_Handler 4 static,ignoring_inline_asm
-../Core/Src/main.c:266:6:assert_failed 16 static
+../Core/Src/main.c:177:6:SystemClock_Config 88 static
+../Core/Src/main.c:231:6:HAL_TIM_PeriodElapsedCallback 16 static
+../Core/Src/main.c:248:6:Error_Handler 4 static,ignoring_inline_asm
+../Core/Src/main.c:267:6:assert_failed 16 static
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.cyclo
index 53717af..b693d68 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.cyclo
@@ -7,4 +7,4 @@
../Core/Src/parse.c:48:6:check_uint8 3
../Core/Src/parse.c:57:10:unpackUint32 1
../Core/Src/parse.c:68:6:check_uint32 3
-../Core/Src/parse.c:77:6:parse_command 100
+../Core/Src/parse.c:77:6:parse_command 102
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.o
index d43b7a6..7aca322 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.su b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.su
index cfe5739..f9746d2 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.su
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.su
@@ -7,4 +7,4 @@
../Core/Src/parse.c:48:6:check_uint8 16 static
../Core/Src/parse.c:57:10:unpackUint32 24 static
../Core/Src/parse.c:68:6:check_uint32 24 static
-../Core/Src/parse.c:77:6:parse_command 80 static
+../Core/Src/parse.c:77:6:parse_command 88 static
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/stm32f4xx_it.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/stm32f4xx_it.o
index e83db3a..60dc883 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/stm32f4xx_it.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/stm32f4xx_it.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.cyclo
index 29cb197..0b0ea9c 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.cyclo
@@ -5,7 +5,7 @@
../Core/Src/tim.c:305:6:MX_TIM6_Init 3
../Core/Src/tim.c:338:6:MX_TIM9_Init 5
../Core/Src/tim.c:385:6:MX_TIM11_Init 5
-../Core/Src/tim.c:430:6:MX_TIM14_Init 2
-../Core/Src/tim.c:456:6:HAL_TIM_Base_MspInit 9
-../Core/Src/tim.c:552:6:HAL_TIM_MspPostInit 7
-../Core/Src/tim.c:700:6:HAL_TIM_Base_MspDeInit 9
+../Core/Src/tim.c:430:6:MX_TIM14_Init 5
+../Core/Src/tim.c:475:6:HAL_TIM_Base_MspInit 9
+../Core/Src/tim.c:571:6:HAL_TIM_MspPostInit 8
+../Core/Src/tim.c:740:6:HAL_TIM_Base_MspDeInit 9
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.o
index 212ac4c..02be8a0 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.su b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.su
index ce681d3..2d56d0f 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.su
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.su
@@ -5,7 +5,7 @@
../Core/Src/tim.c:305:6:MX_TIM6_Init 16 static
../Core/Src/tim.c:338:6:MX_TIM9_Init 56 static
../Core/Src/tim.c:385:6:MX_TIM11_Init 40 static
-../Core/Src/tim.c:430:6:MX_TIM14_Init 8 static
-../Core/Src/tim.c:456:6:HAL_TIM_Base_MspInit 48 static
-../Core/Src/tim.c:552:6:HAL_TIM_MspPostInit 64 static
-../Core/Src/tim.c:700:6:HAL_TIM_Base_MspDeInit 16 static
+../Core/Src/tim.c:430:6:MX_TIM14_Init 40 static
+../Core/Src/tim.c:475:6:HAL_TIM_Base_MspInit 48 static
+../Core/Src/tim.c:571:6:HAL_TIM_MspPostInit 64 static
+../Core/Src/tim.c:740:6:HAL_TIM_Base_MspDeInit 16 static
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/usart.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/usart.o
index fc6dc47..d5c5279 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/usart.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/usart.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.elf b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.elf
index 14d45de..6bcb68d 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.elf and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.elf differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.list b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.list
index 2c1d9c0..1ea6623 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.list
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.list
@@ -5,47 +5,47 @@ Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001d8 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 0000e914 080001e0 080001e0 000011e0 2**4
+ 1 .text 0000ed94 080001e0 080001e0 000011e0 2**4
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 00000490 0800eaf4 0800eaf4 0000faf4 2**2
+ 2 .rodata 00000490 0800ef74 0800ef74 0000ff74 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 0800ef84 0800ef84 00010070 2**0
+ 3 .ARM.extab 00000000 0800f404 0800f404 00011070 2**0
CONTENTS
- 4 .ARM 00000008 0800ef84 0800ef84 0000ff84 2**2
+ 4 .ARM 00000008 0800f404 0800f404 00010404 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 5 .preinit_array 00000000 0800ef8c 0800ef8c 00010070 2**0
+ 5 .preinit_array 00000000 0800f40c 0800f40c 00011070 2**0
CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000004 0800ef8c 0800ef8c 0000ff8c 2**2
+ 6 .init_array 00000004 0800f40c 0800f40c 0001040c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 7 .fini_array 00000004 0800ef90 0800ef90 0000ff90 2**2
+ 7 .fini_array 00000004 0800f410 0800f410 00010410 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 8 .data 00000070 20000000 0800ef94 00010000 2**3
+ 8 .data 00000070 20000000 0800f414 00011000 2**3
CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 00011190 20000070 0800f004 00010070 2**2
+ 9 .bss 00011190 20000070 0800f484 00011070 2**2
ALLOC
- 10 ._user_heap_stack 00001e00 20011200 0800f004 00010200 2**0
+ 10 ._user_heap_stack 00001e00 20011200 0800f484 00011200 2**0
ALLOC
- 11 .ARM.attributes 00000030 00000000 00000000 00010070 2**0
+ 11 .ARM.attributes 00000030 00000000 00000000 00011070 2**0
CONTENTS, READONLY
- 12 .debug_info 0001fab7 00000000 00000000 000100a0 2**0
+ 12 .debug_info 0001fcbe 00000000 00000000 000110a0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00004ab7 00000000 00000000 0002fb57 2**0
+ 13 .debug_abbrev 00004a9e 00000000 00000000 00030d5e 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 000018b8 00000000 00000000 00034610 2**3
+ 14 .debug_aranges 000018d8 00000000 00000000 00035800 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_rnglists 0000131c 00000000 00000000 00035ec8 2**0
+ 15 .debug_rnglists 00001336 00000000 00000000 000370d8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro 000270e5 00000000 00000000 000371e4 2**0
+ 16 .debug_macro 00027127 00000000 00000000 0003840e 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line 00024537 00000000 00000000 0005e2c9 2**0
+ 17 .debug_line 0002469e 00000000 00000000 0005f535 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str 000e79e4 00000000 00000000 00082800 2**0
+ 18 .debug_str 000e7b1d 00000000 00000000 00083bd3 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment 00000043 00000000 00000000 0016a1e4 2**0
+ 19 .comment 00000043 00000000 00000000 0016b6f0 2**0
CONTENTS, READONLY
- 20 .debug_frame 00006c28 00000000 00000000 0016a228 2**2
+ 20 .debug_frame 00006cc4 00000000 00000000 0016b734 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
- 21 .debug_line_str 00000070 00000000 00000000 00170e50 2**0
+ 21 .debug_line_str 00000070 00000000 00000000 001723f8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
@@ -64,7 +64,7 @@ Disassembly of section .text:
80001f6: bd10 pop {r4, pc}
80001f8: 20000070 .word 0x20000070
80001fc: 00000000 .word 0x00000000
- 8000200: 0800eadc .word 0x0800eadc
+ 8000200: 0800ef5c .word 0x0800ef5c
08000204 :
8000204: b508 push {r3, lr}
@@ -76,7 +76,7 @@ Disassembly of section .text:
8000212: bd08 pop {r3, pc}
8000214: 00000000 .word 0x00000000
8000218: 20000074 .word 0x20000074
- 800021c: 0800eadc .word 0x0800eadc
+ 800021c: 0800ef5c .word 0x0800ef5c
08000220 :
8000220: 4603 mov r3, r0
@@ -1325,13 +1325,13 @@ void MX_ADC1_Init(void)
8000fda: 615a str r2, [r3, #20]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8000fdc: 483e ldr r0, [pc, #248] @ (80010d8 )
- 8000fde: f004 fe91 bl 8005d04
+ 8000fde: f005 f8d1 bl 8006184
8000fe2: 4603 mov r3, r0
8000fe4: 2b00 cmp r3, #0
8000fe6: d001 beq.n 8000fec
{
Error_Handler();
- 8000fe8: f002 f91a bl 8003220
+ 8000fe8: f002 fad8 bl 800359c
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1349,13 +1349,13 @@ void MX_ADC1_Init(void)
8000ff8: 463b mov r3, r7
8000ffa: 4619 mov r1, r3
8000ffc: 4836 ldr r0, [pc, #216] @ (80010d8 )
- 8000ffe: f005 f98f bl 8006320
+ 8000ffe: f005 fbcf bl 80067a0
8001002: 4603 mov r3, r0
8001004: 2b00 cmp r3, #0
8001006: d001 beq.n 800100c
{
Error_Handler();
- 8001008: f002 f90a bl 8003220
+ 8001008: f002 fac8 bl 800359c
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1370,13 +1370,13 @@ void MX_ADC1_Init(void)
8001014: 463b mov r3, r7
8001016: 4619 mov r1, r3
8001018: 482f ldr r0, [pc, #188] @ (80010d8 )
- 800101a: f005 f981 bl 8006320
+ 800101a: f005 fbc1 bl 80067a0
800101e: 4603 mov r3, r0
8001020: 2b00 cmp r3, #0
8001022: d001 beq.n 8001028
{
Error_Handler();
- 8001024: f002 f8fc bl 8003220
+ 8001024: f002 faba bl 800359c
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1391,13 +1391,13 @@ void MX_ADC1_Init(void)
8001030: 463b mov r3, r7
8001032: 4619 mov r1, r3
8001034: 4828 ldr r0, [pc, #160] @ (80010d8 )
- 8001036: f005 f973 bl 8006320
+ 8001036: f005 fbb3 bl 80067a0
800103a: 4603 mov r3, r0
800103c: 2b00 cmp r3, #0
800103e: d001 beq.n 8001044
{
Error_Handler();
- 8001040: f002 f8ee bl 8003220
+ 8001040: f002 faac bl 800359c
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1412,13 +1412,13 @@ void MX_ADC1_Init(void)
800104c: 463b mov r3, r7
800104e: 4619 mov r1, r3
8001050: 4821 ldr r0, [pc, #132] @ (80010d8 )
- 8001052: f005 f965 bl 8006320
+ 8001052: f005 fba5 bl 80067a0
8001056: 4603 mov r3, r0
8001058: 2b00 cmp r3, #0
800105a: d001 beq.n 8001060
{
Error_Handler();
- 800105c: f002 f8e0 bl 8003220
+ 800105c: f002 fa9e bl 800359c
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1433,13 +1433,13 @@ void MX_ADC1_Init(void)
8001068: 463b mov r3, r7
800106a: 4619 mov r1, r3
800106c: 481a ldr r0, [pc, #104] @ (80010d8 )
- 800106e: f005 f957 bl 8006320
+ 800106e: f005 fb97 bl 80067a0
8001072: 4603 mov r3, r0
8001074: 2b00 cmp r3, #0
8001076: d001 beq.n 800107c
{
Error_Handler();
- 8001078: f002 f8d2 bl 8003220
+ 8001078: f002 fa90 bl 800359c
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1454,13 +1454,13 @@ void MX_ADC1_Init(void)
8001084: 463b mov r3, r7
8001086: 4619 mov r1, r3
8001088: 4813 ldr r0, [pc, #76] @ (80010d8 )
- 800108a: f005 f949 bl 8006320
+ 800108a: f005 fb89 bl 80067a0
800108e: 4603 mov r3, r0
8001090: 2b00 cmp r3, #0
8001092: d001 beq.n 8001098
{
Error_Handler();
- 8001094: f002 f8c4 bl 8003220
+ 8001094: f002 fa82 bl 800359c
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1475,13 +1475,13 @@ void MX_ADC1_Init(void)
80010a0: 463b mov r3, r7
80010a2: 4619 mov r1, r3
80010a4: 480c ldr r0, [pc, #48] @ (80010d8 )
- 80010a6: f005 f93b bl 8006320
+ 80010a6: f005 fb7b bl 80067a0
80010aa: 4603 mov r3, r0
80010ac: 2b00 cmp r3, #0
80010ae: d001 beq.n 80010b4
{
Error_Handler();
- 80010b0: f002 f8b6 bl 8003220
+ 80010b0: f002 fa74 bl 800359c
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1496,13 +1496,13 @@ void MX_ADC1_Init(void)
80010bc: 463b mov r3, r7
80010be: 4619 mov r1, r3
80010c0: 4805 ldr r0, [pc, #20] @ (80010d8 )
- 80010c2: f005 f92d bl 8006320
+ 80010c2: f005 fb6d bl 80067a0
80010c6: 4603 mov r3, r0
80010c8: 2b00 cmp r3, #0
80010ca: d001 beq.n 80010d0
{
Error_Handler();
- 80010cc: f002 f8a8 bl 8003220
+ 80010cc: f002 fa66 bl 800359c
}
/* USER CODE BEGIN ADC1_Init 2 */
@@ -1604,7 +1604,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
8001166: f107 0314 add.w r3, r7, #20
800116a: 4619 mov r1, r3
800116c: 480b ldr r0, [pc, #44] @ (800119c )
- 800116e: f006 fa0f bl 8007590
+ 800116e: f006 fc4f bl 8007a10
GPIO_InitStruct.Pin = RA_ADC_Pin|RV_ADC_Pin|LV_ADC_Pin;
8001172: 2370 movs r3, #112 @ 0x70
@@ -1619,7 +1619,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
800117e: f107 0314 add.w r3, r7, #20
8001182: 4619 mov r1, r3
8001184: 4806 ldr r0, [pc, #24] @ (80011a0 )
- 8001186: f006 fa03 bl 8007590
+ 8001186: f006 fc43 bl 8007a10
/* USER CODE BEGIN ADC1_MspInit 1 */
@@ -1696,7 +1696,7 @@ void adc_read(adc_struct* adc)
80011ee: 6078 str r0, [r7, #4]
adc->error = HAL_ADC_Start(&hadc1);
80011f0: 4874 ldr r0, [pc, #464] @ (80013c4 )
- 80011f2: f004 fee5 bl 8005fc0
+ 80011f2: f005 f925 bl 8006440
80011f6: 4603 mov r3, r0
80011f8: 461a mov r2, r3
80011fa: 687b ldr r3, [r7, #4]
@@ -1704,14 +1704,14 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
80011fe: 2101 movs r1, #1
8001200: 4870 ldr r0, [pc, #448] @ (80013c4 )
- 8001202: f004 fff5 bl 80061f0
+ 8001202: f005 fa35 bl 8006670
8001206: 4603 mov r3, r0
8001208: 461a mov r2, r3
800120a: 687b ldr r3, [r7, #4]
800120c: 701a strb r2, [r3, #0]
adc->ecg_1_raw = HAL_ADC_GetValue(&hadc1);//Небольшой псевдо фильтр цифровой K - 0.1
800120e: 486d ldr r0, [pc, #436] @ (80013c4 )
- 8001210: f005 f879 bl 8006306
+ 8001210: f005 fab9 bl 8006786
8001214: 4603 mov r3, r0
8001216: b29a uxth r2, r3
8001218: 687b ldr r3, [r7, #4]
@@ -1719,7 +1719,7 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_Start(&hadc1);
800121c: 4869 ldr r0, [pc, #420] @ (80013c4 )
- 800121e: f004 fecf bl 8005fc0
+ 800121e: f005 f90f bl 8006440
8001222: 4603 mov r3, r0
8001224: 461a mov r2, r3
8001226: 687b ldr r3, [r7, #4]
@@ -1727,14 +1727,14 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
800122a: 2101 movs r1, #1
800122c: 4865 ldr r0, [pc, #404] @ (80013c4 )
- 800122e: f004 ffdf bl 80061f0
+ 800122e: f005 fa1f bl 8006670
8001232: 4603 mov r3, r0
8001234: 461a mov r2, r3
8001236: 687b ldr r3, [r7, #4]
8001238: 701a strb r2, [r3, #0]
adc->ecg_2_raw = HAL_ADC_GetValue(&hadc1);
800123a: 4862 ldr r0, [pc, #392] @ (80013c4 )
- 800123c: f005 f863 bl 8006306
+ 800123c: f005 faa3 bl 8006786
8001240: 4603 mov r3, r0
8001242: b29a uxth r2, r3
8001244: 687b ldr r3, [r7, #4]
@@ -1742,7 +1742,7 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_Start(&hadc1);
8001248: 485e ldr r0, [pc, #376] @ (80013c4 )
- 800124a: f004 feb9 bl 8005fc0
+ 800124a: f005 f8f9 bl 8006440
800124e: 4603 mov r3, r0
8001250: 461a mov r2, r3
8001252: 687b ldr r3, [r7, #4]
@@ -1750,14 +1750,14 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
8001256: 2101 movs r1, #1
8001258: 485a ldr r0, [pc, #360] @ (80013c4 )
- 800125a: f004 ffc9 bl 80061f0
+ 800125a: f005 fa09 bl 8006670
800125e: 4603 mov r3, r0
8001260: 461a mov r2, r3
8001262: 687b ldr r3, [r7, #4]
8001264: 701a strb r2, [r3, #0]
adc->ecg_3_raw = HAL_ADC_GetValue(&hadc1);
8001266: 4857 ldr r0, [pc, #348] @ (80013c4 )
- 8001268: f005 f84d bl 8006306
+ 8001268: f005 fa8d bl 8006786
800126c: 4603 mov r3, r0
800126e: b29a uxth r2, r3
8001270: 687b ldr r3, [r7, #4]
@@ -1765,7 +1765,7 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_Start(&hadc1);
8001274: 4853 ldr r0, [pc, #332] @ (80013c4 )
- 8001276: f004 fea3 bl 8005fc0
+ 8001276: f005 f8e3 bl 8006440
800127a: 4603 mov r3, r0
800127c: 461a mov r2, r3
800127e: 687b ldr r3, [r7, #4]
@@ -1773,14 +1773,14 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
8001282: 2101 movs r1, #1
8001284: 484f ldr r0, [pc, #316] @ (80013c4 )
- 8001286: f004 ffb3 bl 80061f0
+ 8001286: f005 f9f3 bl 8006670
800128a: 4603 mov r3, r0
800128c: 461a mov r2, r3
800128e: 687b ldr r3, [r7, #4]
8001290: 701a strb r2, [r3, #0]
adc->rv_comp_raw = HAL_ADC_GetValue(&hadc1);//Небольшой псевдо фильтр цифровой K - 0.1
8001292: 484c ldr r0, [pc, #304] @ (80013c4 )
- 8001294: f005 f837 bl 8006306
+ 8001294: f005 fa77 bl 8006786
8001298: 4603 mov r3, r0
800129a: b29a uxth r2, r3
800129c: 687b ldr r3, [r7, #4]
@@ -1788,7 +1788,7 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_Start(&hadc1);
80012a0: 4848 ldr r0, [pc, #288] @ (80013c4 )
- 80012a2: f004 fe8d bl 8005fc0
+ 80012a2: f005 f8cd bl 8006440
80012a6: 4603 mov r3, r0
80012a8: 461a mov r2, r3
80012aa: 687b ldr r3, [r7, #4]
@@ -1796,14 +1796,14 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
80012ae: 2101 movs r1, #1
80012b0: 4844 ldr r0, [pc, #272] @ (80013c4 )
- 80012b2: f004 ff9d bl 80061f0
+ 80012b2: f005 f9dd bl 8006670
80012b6: 4603 mov r3, r0
80012b8: 461a mov r2, r3
80012ba: 687b ldr r3, [r7, #4]
80012bc: 701a strb r2, [r3, #0]
adc->ra_comp_raw = HAL_ADC_GetValue(&hadc1);
80012be: 4841 ldr r0, [pc, #260] @ (80013c4 )
- 80012c0: f005 f821 bl 8006306
+ 80012c0: f005 fa61 bl 8006786
80012c4: 4603 mov r3, r0
80012c6: b29a uxth r2, r3
80012c8: 687b ldr r3, [r7, #4]
@@ -1811,7 +1811,7 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_Start(&hadc1);
80012cc: 483d ldr r0, [pc, #244] @ (80013c4 )
- 80012ce: f004 fe77 bl 8005fc0
+ 80012ce: f005 f8b7 bl 8006440
80012d2: 4603 mov r3, r0
80012d4: 461a mov r2, r3
80012d6: 687b ldr r3, [r7, #4]
@@ -1819,14 +1819,14 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
80012da: 2101 movs r1, #1
80012dc: 4839 ldr r0, [pc, #228] @ (80013c4 )
- 80012de: f004 ff87 bl 80061f0
+ 80012de: f005 f9c7 bl 8006670
80012e2: 4603 mov r3, r0
80012e4: 461a mov r2, r3
80012e6: 687b ldr r3, [r7, #4]
80012e8: 701a strb r2, [r3, #0]
adc->lv_comp_raw = HAL_ADC_GetValue(&hadc1);
80012ea: 4836 ldr r0, [pc, #216] @ (80013c4 )
- 80012ec: f005 f80b bl 8006306
+ 80012ec: f005 fa4b bl 8006786
80012f0: 4603 mov r3, r0
80012f2: b29a uxth r2, r3
80012f4: 687b ldr r3, [r7, #4]
@@ -1834,7 +1834,7 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_Start(&hadc1);
80012f8: 4832 ldr r0, [pc, #200] @ (80013c4 )
- 80012fa: f004 fe61 bl 8005fc0
+ 80012fa: f005 f8a1 bl 8006440
80012fe: 4603 mov r3, r0
8001300: 461a mov r2, r3
8001302: 687b ldr r3, [r7, #4]
@@ -1842,14 +1842,14 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
8001306: 2101 movs r1, #1
8001308: 482e ldr r0, [pc, #184] @ (80013c4 )
- 800130a: f004 ff71 bl 80061f0
+ 800130a: f005 f9b1 bl 8006670
800130e: 4603 mov r3, r0
8001310: 461a mov r2, r3
8001312: 687b ldr r3, [r7, #4]
8001314: 701a strb r2, [r3, #0]
adc->hv_raw = HAL_ADC_GetValue(&hadc1);
8001316: 482b ldr r0, [pc, #172] @ (80013c4 )
- 8001318: f004 fff5 bl 8006306
+ 8001318: f005 fa35 bl 8006786
800131c: 4603 mov r3, r0
800131e: b29a uxth r2, r3
8001320: 687b ldr r3, [r7, #4]
@@ -1872,7 +1872,7 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_Start(&hadc1);
8001346: 481f ldr r0, [pc, #124] @ (80013c4 )
- 8001348: f004 fe3a bl 8005fc0
+ 8001348: f005 f87a bl 8006440
800134c: 4603 mov r3, r0
800134e: 461a mov r2, r3
8001350: 687b ldr r3, [r7, #4]
@@ -1880,14 +1880,14 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
8001354: 2101 movs r1, #1
8001356: 481b ldr r0, [pc, #108] @ (80013c4 )
- 8001358: f004 ff4a bl 80061f0
+ 8001358: f005 f98a bl 8006670
800135c: 4603 mov r3, r0
800135e: 461a mov r2, r3
8001360: 687b ldr r3, [r7, #4]
8001362: 701a strb r2, [r3, #0]
adc->bat_raw = HAL_ADC_GetValue(&hadc1);
8001364: 4817 ldr r0, [pc, #92] @ (80013c4 )
- 8001366: f004 ffce bl 8006306
+ 8001366: f005 fa0e bl 8006786
800136a: 4603 mov r3, r0
800136c: b29a uxth r2, r3
800136e: 687b ldr r3, [r7, #4]
@@ -1920,7 +1920,7 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_Stop(&hadc1);
80013a6: 4807 ldr r0, [pc, #28] @ (80013c4 )
- 80013a8: f004 fee2 bl 8006170
+ 80013a8: f005 f922 bl 80065f0
80013ac: 4603 mov r3, r0
80013ae: 461a mov r2, r3
80013b0: 687b ldr r3, [r7, #4]
@@ -2006,18 +2006,18 @@ void lets_sleep(void)
8001428: 2200 movs r2, #0
800142a: 2180 movs r1, #128 @ 0x80
800142c: 4810 ldr r0, [pc, #64] @ (8001470 )
- 800142e: f006 fb13 bl 8007a58
+ 800142e: f006 fd53 bl 8007ed8
//Выключили питание потенциометра
HAL_GPIO_WritePin(POT_PWR_GPIO_Port, POT_PWR_Pin, GPIO_PIN_RESET);
8001432: 2200 movs r2, #0
8001434: f44f 4180 mov.w r1, #16384 @ 0x4000
8001438: 480e ldr r0, [pc, #56] @ (8001474 )
- 800143a: f006 fb0d bl 8007a58
+ 800143a: f006 fd4d bl 8007ed8
HAL_GPIO_WritePin(BLE_PWR_GPIO_Port, BLE_PWR_Pin, SET);
800143e: 2201 movs r2, #1
8001440: f44f 5180 mov.w r1, #4096 @ 0x1000
8001444: 480c ldr r0, [pc, #48] @ (8001478 )
- 8001446: f006 fb07 bl 8007a58
+ 8001446: f006 fd47 bl 8007ed8
// hv_power(false);
// hv_ll_control(z_state, z_state, z_state);
// HAL_Delay(20);
@@ -2025,7 +2025,7 @@ void lets_sleep(void)
HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN1);
800144a: f44f 7080 mov.w r0, #256 @ 0x100
- 800144e: f006 fb51 bl 8007af4
+ 800144e: f006 fd91 bl 8007f74
//Сейчас второй кнопки нет!!
//HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN2);//если вторая кнопка тоже подключена PC0
__HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU);
@@ -2036,9 +2036,9 @@ void lets_sleep(void)
800145c: 6013 str r3, [r2, #0]
HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN1);
800145e: f44f 7080 mov.w r0, #256 @ 0x100
- 8001462: f006 fb25 bl 8007ab0
+ 8001462: f006 fd65 bl 8007f30
HAL_PWR_EnterSTANDBYMode();
- 8001466: f006 fb67 bl 8007b38
+ 8001466: f006 fda7 bl 8007fb8
}
800146a: bf00 nop
800146c: bd80 pop {r7, pc}
@@ -2115,19 +2115,19 @@ void MX_DMA_Init(void)
80014d2: 2200 movs r2, #0
80014d4: 2105 movs r1, #5
80014d6: 203a movs r0, #58 @ 0x3a
- 80014d8: f005 fa70 bl 80069bc
+ 80014d8: f005 fcb0 bl 8006e3c
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
80014dc: 203a movs r0, #58 @ 0x3a
- 80014de: f005 fa99 bl 8006a14
+ 80014de: f005 fcd9 bl 8006e94
/* DMA2_Stream7_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
80014e2: 2200 movs r2, #0
80014e4: 2105 movs r1, #5
80014e6: 2046 movs r0, #70 @ 0x46
- 80014e8: f005 fa68 bl 80069bc
+ 80014e8: f005 fca8 bl 8006e3c
HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
80014ec: 2046 movs r0, #70 @ 0x46
- 80014ee: f005 fa91 bl 8006a14
+ 80014ee: f005 fcd1 bl 8006e94
}
80014f2: bf00 nop
@@ -2276,8 +2276,8 @@ float iir_lp30(float NewSample) {
80015f2: 46bd mov sp, r7
80015f4: bcb0 pop {r4, r5, r7}
80015f6: 4770 bx lr
- 80015f8: 0800eb6c .word 0x0800eb6c
- 80015fc: 0800eb80 .word 0x0800eb80
+ 80015f8: 0800efec .word 0x0800efec
+ 80015fc: 0800f000 .word 0x0800f000
8001600: 20000128 .word 0x20000128
8001604: 2000013c .word 0x2000013c
@@ -2330,7 +2330,7 @@ void MX_FREERTOS_Init(void) {
/* USER CODE BEGIN Init */
init_icd(&ICD);
8001642: 4832 ldr r0, [pc, #200] @ (800170c )
- 8001644: f000 faa0 bl 8001b88
+ 8001644: f000 fa86 bl 8001b54
/* add queues, ... */
/* USER CODE END RTOS_QUEUES */
@@ -2348,7 +2348,7 @@ void MX_FREERTOS_Init(void) {
800165c: f107 0374 add.w r3, r7, #116 @ 0x74
8001660: 2100 movs r1, #0
8001662: 4618 mov r0, r3
- 8001664: f00b f9d1 bl 800ca0a
+ 8001664: f00b fc11 bl 800ce8a
8001668: 4603 mov r3, r0
800166a: 4a2a ldr r2, [pc, #168] @ (8001714 )
800166c: 6013 str r3, [r2, #0]
@@ -2366,7 +2366,7 @@ void MX_FREERTOS_Init(void) {
8001682: f107 0358 add.w r3, r7, #88 @ 0x58
8001686: 2100 movs r1, #0
8001688: 4618 mov r0, r3
- 800168a: f00b f9be bl 800ca0a
+ 800168a: f00b fbfe bl 800ce8a
800168e: 4603 mov r3, r0
8001690: 4a22 ldr r2, [pc, #136] @ (800171c )
8001692: 6013 str r3, [r2, #0]
@@ -2384,7 +2384,7 @@ void MX_FREERTOS_Init(void) {
80016a8: f107 033c add.w r3, r7, #60 @ 0x3c
80016ac: 2100 movs r1, #0
80016ae: 4618 mov r0, r3
- 80016b0: f00b f9ab bl 800ca0a
+ 80016b0: f00b fbeb bl 800ce8a
80016b4: 4603 mov r3, r0
80016b6: 4a1b ldr r2, [pc, #108] @ (8001724 )
80016b8: 6013 str r3, [r2, #0]
@@ -2402,7 +2402,7 @@ void MX_FREERTOS_Init(void) {
80016ce: f107 0320 add.w r3, r7, #32
80016d2: 2100 movs r1, #0
80016d4: 4618 mov r0, r3
- 80016d6: f00b f998 bl 800ca0a
+ 80016d6: f00b fbd8 bl 800ce8a
80016da: 4603 mov r3, r0
80016dc: 4a13 ldr r2, [pc, #76] @ (800172c )
80016de: 6013 str r3, [r2, #0]
@@ -2420,7 +2420,7 @@ void MX_FREERTOS_Init(void) {
80016f2: 1d3b adds r3, r7, #4
80016f4: 2100 movs r1, #0
80016f6: 4618 mov r0, r3
- 80016f8: f00b f987 bl 800ca0a
+ 80016f8: f00b fbc7 bl 800ce8a
80016fc: 4603 mov r3, r0
80016fe: 4a0d ldr r2, [pc, #52] @ (8001734 )
8001700: 6013 str r3, [r2, #0]
@@ -2436,15 +2436,15 @@ void MX_FREERTOS_Init(void) {
8001708: bdb0 pop {r4, r5, r7, pc}
800170a: bf00 nop
800170c: 20001ea4 .word 0x20001ea4
- 8001710: 0800eba0 .word 0x0800eba0
+ 8001710: 0800f020 .word 0x0800f020
8001714: 20000150 .word 0x20000150
- 8001718: 0800ebc8 .word 0x0800ebc8
+ 8001718: 0800f048 .word 0x0800f048
800171c: 200006a4 .word 0x200006a4
- 8001720: 0800ebf0 .word 0x0800ebf0
+ 8001720: 0800f070 .word 0x0800f070
8001724: 20000bf8 .word 0x20000bf8
- 8001728: 0800ec1c .word 0x0800ec1c
+ 8001728: 0800f09c .word 0x0800f09c
800172c: 2000114c .word 0x2000114c
- 8001730: 0800ec40 .word 0x0800ec40
+ 8001730: 0800f0c0 .word 0x0800f0c0
8001734: 200016a0 .word 0x200016a0
08001738 :
@@ -2463,506 +2463,510 @@ void StartDefaultTask(void const * argument)
for (;;)
{
if(ICD.lv_start == true)
- 8001740: 4b0e ldr r3, [pc, #56] @ (800177c )
+ 8001740: 4b0a ldr r3, [pc, #40] @ (800176c )
8001742: f893 3038 ldrb.w r3, [r3, #56] @ 0x38
8001746: 2b00 cmp r3, #0
- 8001748: d013 beq.n 8001772
+ 8001748: d00b beq.n 8001762
{
- rv_lv_control(&ICD,lv_sub_charge);
- 800174a: 2101 movs r1, #1
- 800174c: 480b ldr r0, [pc, #44] @ (800177c )
- 800174e: f001 fb0d bl 8002d6c
- rv_lv_control(&ICD,lv_sub_shock);
- 8001752: 2102 movs r1, #2
- 8001754: 4809 ldr r0, [pc, #36] @ (800177c )
- 8001756: f001 fb09 bl 8002d6c
- rv_lv_control(&ICD,lv_sub_relax);
- 800175a: 2103 movs r1, #3
- 800175c: 4807 ldr r0, [pc, #28] @ (800177c )
- 800175e: f001 fb05 bl 8002d6c
-// rv_lv_control(&ICD,lv_sub_free);
- rv_lv_control(&ICD,lv_sub_discharge);
- 8001762: 2104 movs r1, #4
- 8001764: 4805 ldr r0, [pc, #20] @ (800177c )
- 8001766: f001 fb01 bl 8002d6c
- ICD.lv_start = false;
- 800176a: 4b04 ldr r3, [pc, #16] @ (800177c )
- 800176c: 2200 movs r2, #0
- 800176e: f883 2038 strb.w r2, [r3, #56] @ 0x38
-// rv_lv_control(icd_str,lv_sub_free);
+ if(ICD.lv_mode != lv_mode_BURST)
+ 800174a: 4b08 ldr r3, [pc, #32] @ (800176c )
+ 800174c: f893 303a ldrb.w r3, [r3, #58] @ 0x3a
+ 8001750: 2b01 cmp r3, #1
+ 8001752: d003 beq.n 800175c
+ {
+ one_stimul(&ICD);
+ 8001754: 4805 ldr r0, [pc, #20] @ (800176c )
+ 8001756: f001 fca1 bl 800309c
+ 800175a: e002 b.n 8001762
+ }
+ else
+ {
+ burst(&ICD);
+ 800175c: 4803 ldr r0, [pc, #12] @ (800176c )
+ 800175e: f001 fcd5 bl 800310c
+ }
}
osDelay(5);
- 8001772: 2005 movs r0, #5
- 8001774: f00b f995 bl 800caa2
+ 8001762: 2005 movs r0, #5
+ 8001764: f00b fbdd bl 800cf22
if(ICD.lv_start == true)
- 8001778: e7e2 b.n 8001740
- 800177a: bf00 nop
- 800177c: 20001ea4 .word 0x20001ea4
+ 8001768: e7ea b.n 8001740
+ 800176a: bf00 nop
+ 800176c: 20001ea4 .word 0x20001ea4
-08001780 :
+08001770 :
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartOprosTask */
void StartOprosTask(void const * argument)
{
- 8001780: b580 push {r7, lr}
- 8001782: b082 sub sp, #8
- 8001784: af00 add r7, sp, #0
- 8001786: 6078 str r0, [r7, #4]
+ 8001770: b580 push {r7, lr}
+ 8001772: b082 sub sp, #8
+ 8001774: af00 add r7, sp, #0
+ 8001776: 6078 str r0, [r7, #4]
/* USER CODE BEGIN StartOprosTask */
/* Infinite loop */
for(;;)
{
if (ICD.active_ch == 0)
- 8001788: 4b1a ldr r3, [pc, #104] @ (80017f4 )
- 800178a: 795b ldrb r3, [r3, #5]
- 800178c: 2b00 cmp r3, #0
- 800178e: d02d beq.n 80017ec
+ 8001778: 4b1a ldr r3, [pc, #104] @ (80017e4 )
+ 800177a: 795b ldrb r3, [r3, #5]
+ 800177c: 2b00 cmp r3, #0
+ 800177e: d02d beq.n 80017dc
{
}
else
{
if(adc_str.drdy_trigger)
- 8001790: 4b19 ldr r3, [pc, #100] @ (80017f8 )
- 8001792: 7e1b ldrb r3, [r3, #24]
- 8001794: 2b00 cmp r3, #0
- 8001796: d029 beq.n 80017ec
+ 8001780: 4b19 ldr r3, [pc, #100] @ (80017e8 )
+ 8001782: 7e1b ldrb r3, [r3, #24]
+ 8001784: 2b00 cmp r3, #0
+ 8001786: d029 beq.n 80017dc
{
adc_str.drdy_trigger = false;//сбросили флаг
- 8001798: 4b17 ldr r3, [pc, #92] @ (80017f8 )
- 800179a: 2200 movs r2, #0
- 800179c: 761a strb r2, [r3, #24]
+ 8001788: 4b17 ldr r3, [pc, #92] @ (80017e8 )
+ 800178a: 2200 movs r2, #0
+ 800178c: 761a strb r2, [r3, #24]
if(ICD.active_ch == 1)
- 800179e: 4b15 ldr r3, [pc, #84] @ (80017f4 )
- 80017a0: 795b ldrb r3, [r3, #5]
- 80017a2: 2b01 cmp r3, #1
- 80017a4: d105 bne.n 80017b2
+ 800178e: 4b15 ldr r3, [pc, #84] @ (80017e4 )
+ 8001790: 795b ldrb r3, [r3, #5]
+ 8001792: 2b01 cmp r3, #1
+ 8001794: d105 bne.n 80017a2
get_data(&ICD,adc_str.ecg_1_raw);
- 80017a6: 4b14 ldr r3, [pc, #80] @ (80017f8 )
- 80017a8: 885b ldrh r3, [r3, #2]
- 80017aa: 4619 mov r1, r3
- 80017ac: 4811 ldr r0, [pc, #68] @ (80017f4 )
- 80017ae: f000 fb3b bl 8001e28
+ 8001796: 4b14 ldr r3, [pc, #80] @ (80017e8 )
+ 8001798: 885b ldrh r3, [r3, #2]
+ 800179a: 4619 mov r1, r3
+ 800179c: 4811 ldr r0, [pc, #68] @ (80017e4 )
+ 800179e: f000 fb2f bl 8001e00
if(ICD.active_ch == 2)
- 80017b2: 4b10 ldr r3, [pc, #64] @ (80017f4 )
- 80017b4: 795b ldrb r3, [r3, #5]
- 80017b6: 2b02 cmp r3, #2
- 80017b8: d105 bne.n 80017c6
+ 80017a2: 4b10 ldr r3, [pc, #64] @ (80017e4 )
+ 80017a4: 795b ldrb r3, [r3, #5]
+ 80017a6: 2b02 cmp r3, #2
+ 80017a8: d105 bne.n 80017b6
get_data(&ICD,adc_str.ecg_2_raw);
- 80017ba: 4b0f ldr r3, [pc, #60] @ (80017f8 )
- 80017bc: 889b ldrh r3, [r3, #4]
- 80017be: 4619 mov r1, r3
- 80017c0: 480c ldr r0, [pc, #48] @ (80017f4 )
- 80017c2: f000 fb31 bl 8001e28
+ 80017aa: 4b0f ldr r3, [pc, #60] @ (80017e8 )
+ 80017ac: 889b ldrh r3, [r3, #4]
+ 80017ae: 4619 mov r1, r3
+ 80017b0: 480c ldr r0, [pc, #48] @ (80017e4 )
+ 80017b2: f000 fb25 bl 8001e00
if(ICD.active_ch == 3)
- 80017c6: 4b0b ldr r3, [pc, #44] @ (80017f4 )
- 80017c8: 795b ldrb r3, [r3, #5]
- 80017ca: 2b03 cmp r3, #3
- 80017cc: d105 bne.n 80017da
+ 80017b6: 4b0b ldr r3, [pc, #44] @ (80017e4 )
+ 80017b8: 795b ldrb r3, [r3, #5]
+ 80017ba: 2b03 cmp r3, #3
+ 80017bc: d105 bne.n 80017ca
get_data(&ICD,adc_str.ecg_3_raw);
- 80017ce: 4b0a ldr r3, [pc, #40] @ (80017f8 )
- 80017d0: 88db ldrh r3, [r3, #6]
- 80017d2: 4619 mov r1, r3
- 80017d4: 4807 ldr r0, [pc, #28] @ (80017f4 )
- 80017d6: f000 fb27 bl 8001e28
+ 80017be: 4b0a ldr r3, [pc, #40] @ (80017e8 )
+ 80017c0: 88db ldrh r3, [r3, #6]
+ 80017c2: 4619 mov r1, r3
+ 80017c4: 4807 ldr r0, [pc, #28] @ (80017e4 )
+ 80017c6: f000 fb1b bl 8001e00
//обычный алгоритм поиска
search_alg(&ICD);
- 80017da: 4806 ldr r0, [pc, #24] @ (80017f4 )
- 80017dc: f000 fc86 bl 80020ec
+ 80017ca: 4806 ldr r0, [pc, #24] @ (80017e4 )
+ 80017cc: f000 fc7a bl 80020c4
ble_HEX_new(&Control,&ICD, &adc_str,true);
- 80017e0: 2301 movs r3, #1
- 80017e2: 4a05 ldr r2, [pc, #20] @ (80017f8 )
- 80017e4: 4903 ldr r1, [pc, #12] @ (80017f4 )
- 80017e6: 4805 ldr r0, [pc, #20] @ (80017fc