First commit
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1_iteration/firmware/ECG_D_0001_31102024/.cproject
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181
1_iteration/firmware/ECG_D_0001_31102024/.cproject
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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||||||
|
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.534731335" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
|
||||||
|
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.264999533" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
|
||||||
|
<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
|
||||||
|
<listOptionValue builtIn="false" value="STM32F103xB"/>
|
||||||
|
</option>
|
||||||
|
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1301573144" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
|
||||||
|
<listOptionValue builtIn="false" value="../Core/Inc"/>
|
||||||
|
<listOptionValue builtIn="false" value="../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy"/>
|
||||||
|
<listOptionValue builtIn="false" value="../Drivers/STM32F1xx_HAL_Driver/Inc"/>
|
||||||
|
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F1xx/Include"/>
|
||||||
|
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
|
||||||
|
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/include"/>
|
||||||
|
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
|
||||||
|
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3"/>
|
||||||
|
</option>
|
||||||
|
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.890305931" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
|
||||||
|
</tool>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1389103387" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
|
||||||
|
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1161345019" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
|
||||||
|
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1770610956" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
|
||||||
|
</tool>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1235019932" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
|
||||||
|
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1634619699" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32F103CBTX_FLASH.ld}" valueType="string"/>
|
||||||
|
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.429736672" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
|
||||||
|
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||||
|
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||||
|
</inputType>
|
||||||
|
</tool>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.823562470" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1567328621" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.450670113" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.926933123" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.2038647136" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1648907190" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.301632074" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1392494808" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
|
||||||
|
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.491571871" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
|
||||||
|
</toolChain>
|
||||||
|
</folderInfo>
|
||||||
|
<sourceEntries>
|
||||||
|
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
|
||||||
|
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
|
||||||
|
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
|
||||||
|
</sourceEntries>
|
||||||
|
</configuration>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||||
|
</cconfiguration>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
|
||||||
|
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||||
|
<project id="ECG_D_0001_31102024.null.1615997736" name="ECG_D_0001_31102024"/>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||||
|
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||||
|
<storageModule moduleId="scannerConfiguration">
|
||||||
|
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||||
|
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.731739652;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.731739652.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2037282077;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.890305931">
|
||||||
|
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||||
|
</scannerConfigBuildInfo>
|
||||||
|
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1769273425;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1769273425.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1176837506;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.968066242">
|
||||||
|
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||||
|
</scannerConfigBuildInfo>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="refreshScope"/>
|
||||||
|
</cproject>
|
||||||
38
1_iteration/firmware/ECG_D_0001_31102024/.mxproject
Normal file
38
1_iteration/firmware/ECG_D_0001_31102024/.mxproject
Normal file
File diff suppressed because one or more lines are too long
32
1_iteration/firmware/ECG_D_0001_31102024/.project
Normal file
32
1_iteration/firmware/ECG_D_0001_31102024/.project
Normal file
@ -0,0 +1,32 @@
|
|||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<projectDescription>
|
||||||
|
<name>ECG_D_0001_31102024</name>
|
||||||
|
<comment></comment>
|
||||||
|
<projects>
|
||||||
|
</projects>
|
||||||
|
<buildSpec>
|
||||||
|
<buildCommand>
|
||||||
|
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||||
|
<triggers>clean,full,incremental,</triggers>
|
||||||
|
<arguments>
|
||||||
|
</arguments>
|
||||||
|
</buildCommand>
|
||||||
|
<buildCommand>
|
||||||
|
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||||
|
<triggers>full,incremental,</triggers>
|
||||||
|
<arguments>
|
||||||
|
</arguments>
|
||||||
|
</buildCommand>
|
||||||
|
</buildSpec>
|
||||||
|
<natures>
|
||||||
|
<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
|
||||||
|
<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
|
||||||
|
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||||
|
<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature</nature>
|
||||||
|
<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
|
||||||
|
<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
|
||||||
|
<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
|
||||||
|
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||||
|
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||||
|
</natures>
|
||||||
|
</projectDescription>
|
||||||
@ -0,0 +1,2 @@
|
|||||||
|
eclipse.preferences.version=1
|
||||||
|
sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}}
|
||||||
@ -0,0 +1,25 @@
|
|||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||||
|
<project>
|
||||||
|
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1769273425" name="Debug">
|
||||||
|
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||||
|
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||||
|
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||||
|
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||||
|
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1873463769924096644" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||||
|
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||||
|
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||||
|
</provider>
|
||||||
|
</extension>
|
||||||
|
</configuration>
|
||||||
|
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.731739652" name="Release">
|
||||||
|
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||||
|
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||||
|
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||||
|
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||||
|
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1873463769924096644" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||||
|
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||||
|
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||||
|
</provider>
|
||||||
|
</extension>
|
||||||
|
</configuration>
|
||||||
|
</project>
|
||||||
@ -0,0 +1,2 @@
|
|||||||
|
eclipse.preferences.version=1
|
||||||
|
encoding/<project>=UTF-8
|
||||||
@ -0,0 +1,4 @@
|
|||||||
|
66BE74F758C12D739921AEA421D593D3=1
|
||||||
|
8DF89ED150041C4CBC7CB9A9CAA90856=9652E4DAA3FD4CA263F793DBE430D716
|
||||||
|
DC22A860405A8BF2F2C095E5B6529F12=9652E4DAA3FD4CA263F793DBE430D716
|
||||||
|
eclipse.preferences.version=1
|
||||||
@ -0,0 +1,133 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/*
|
||||||
|
* FreeRTOS Kernel V10.0.1
|
||||||
|
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||||
|
* this software and associated documentation files (the "Software"), to deal in
|
||||||
|
* the Software without restriction, including without limitation the rights to
|
||||||
|
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||||
|
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||||
|
* subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in all
|
||||||
|
* copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||||
|
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* http://www.FreeRTOS.org
|
||||||
|
* http://aws.amazon.com/freertos
|
||||||
|
*
|
||||||
|
* 1 tab == 4 spaces!
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
#ifndef FREERTOS_CONFIG_H
|
||||||
|
#define FREERTOS_CONFIG_H
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Application specific definitions.
|
||||||
|
*
|
||||||
|
* These definitions should be adjusted for your particular hardware and
|
||||||
|
* application requirements.
|
||||||
|
*
|
||||||
|
* These parameters and more are described within the 'configuration' section of the
|
||||||
|
* FreeRTOS API documentation available on the FreeRTOS.org web site.
|
||||||
|
*
|
||||||
|
* See http://www.freertos.org/a00110.html
|
||||||
|
*----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
/* Section where include file can be added */
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Ensure definitions are only used by the compiler, and not by the assembler. */
|
||||||
|
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
|
||||||
|
#include <stdint.h>
|
||||||
|
extern uint32_t SystemCoreClock;
|
||||||
|
#endif
|
||||||
|
#define configUSE_PREEMPTION 1
|
||||||
|
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||||
|
#define configSUPPORT_DYNAMIC_ALLOCATION 1
|
||||||
|
#define configUSE_IDLE_HOOK 0
|
||||||
|
#define configUSE_TICK_HOOK 0
|
||||||
|
#define configCPU_CLOCK_HZ ( SystemCoreClock )
|
||||||
|
#define configTICK_RATE_HZ ((TickType_t)1000)
|
||||||
|
#define configMAX_PRIORITIES ( 7 )
|
||||||
|
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
|
||||||
|
#define configTOTAL_HEAP_SIZE ((size_t)3072)
|
||||||
|
#define configMAX_TASK_NAME_LEN ( 16 )
|
||||||
|
#define configUSE_16_BIT_TICKS 0
|
||||||
|
#define configUSE_MUTEXES 1
|
||||||
|
#define configQUEUE_REGISTRY_SIZE 8
|
||||||
|
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||||
|
|
||||||
|
/* Co-routine definitions. */
|
||||||
|
#define configUSE_CO_ROUTINES 0
|
||||||
|
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||||
|
|
||||||
|
/* The following flag must be enabled only when using newlib */
|
||||||
|
#define configUSE_NEWLIB_REENTRANT 1
|
||||||
|
|
||||||
|
/* Set the following definitions to 1 to include the API function, or zero
|
||||||
|
to exclude the API function. */
|
||||||
|
#define INCLUDE_vTaskPrioritySet 1
|
||||||
|
#define INCLUDE_uxTaskPriorityGet 1
|
||||||
|
#define INCLUDE_vTaskDelete 1
|
||||||
|
#define INCLUDE_vTaskCleanUpResources 0
|
||||||
|
#define INCLUDE_vTaskSuspend 1
|
||||||
|
#define INCLUDE_vTaskDelayUntil 0
|
||||||
|
#define INCLUDE_vTaskDelay 1
|
||||||
|
#define INCLUDE_xTaskGetSchedulerState 1
|
||||||
|
|
||||||
|
/* Cortex-M specific definitions. */
|
||||||
|
#ifdef __NVIC_PRIO_BITS
|
||||||
|
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
|
||||||
|
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||||
|
#else
|
||||||
|
#define configPRIO_BITS 4
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||||
|
function. */
|
||||||
|
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
|
||||||
|
|
||||||
|
/* The highest interrupt priority that can be used by any interrupt service
|
||||||
|
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||||
|
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||||
|
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||||
|
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||||
|
|
||||||
|
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||||
|
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||||
|
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||||
|
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||||
|
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||||
|
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||||
|
|
||||||
|
/* Normal assert() semantics without relying on the provision of an assert.h
|
||||||
|
header file. */
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
|
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
|
||||||
|
standard names. */
|
||||||
|
#define vPortSVCHandler SVC_Handler
|
||||||
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
|
|
||||||
|
/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
|
||||||
|
to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
|
||||||
|
|
||||||
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Defines */
|
||||||
|
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
|
||||||
|
/* USER CODE END Defines */
|
||||||
|
|
||||||
|
#endif /* FREERTOS_CONFIG_H */
|
||||||
70
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/adc.h
Normal file
70
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/adc.h
Normal file
@ -0,0 +1,70 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file adc.h
|
||||||
|
* @brief This file contains all the function prototypes for
|
||||||
|
* the adc.c file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __ADC_H__
|
||||||
|
#define __ADC_H__
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
#include <stdbool.h>
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
extern ADC_HandleTypeDef hadc1;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_ADC1_Init(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
typedef struct adc_struct
|
||||||
|
{
|
||||||
|
HAL_StatusTypeDef error;//флаг говорящий об ошибке во время работы
|
||||||
|
|
||||||
|
uint16_t ecg_1_raw;
|
||||||
|
uint16_t ecg_2_raw;
|
||||||
|
uint16_t ecg_3_raw;
|
||||||
|
|
||||||
|
uint16_t bat_raw;
|
||||||
|
uint16_t bat_volt;//напряжение в сотых вольта
|
||||||
|
uint8_t bat_pers;
|
||||||
|
|
||||||
|
uint16_t hv_raw;
|
||||||
|
uint16_t hv_volt;
|
||||||
|
|
||||||
|
bool drdy_trigger;//Флаг говорящий о том что готова новая пачка данных
|
||||||
|
}adc_struct;
|
||||||
|
|
||||||
|
void adc_read(adc_struct* adc);//чтение всего в структуру
|
||||||
|
/* USER CODE END Prototypes */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ADC_H__ */
|
||||||
|
|
||||||
192
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/control.h
Normal file
192
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/control.h
Normal file
@ -0,0 +1,192 @@
|
|||||||
|
#ifndef _CONTROL
|
||||||
|
#define _CONTROL
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
|
||||||
|
//#include "usart.h"
|
||||||
|
#include "adc.h"
|
||||||
|
#include "gpio.h"
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
|
#define TYPE_ECG 0
|
||||||
|
#define TYPE_WATCH 1
|
||||||
|
#define DEV_TYPE TYPE_WATCH
|
||||||
|
|
||||||
|
#define MEM_ADR FLASH_MEM_ADDR//адрес куда пишем данные со всеми настройками.
|
||||||
|
#define APP_ADR FLASH_BOOT_ADDR//проги куда прыгать, правда это бессмысленно
|
||||||
|
|
||||||
|
#define BUT_CNT 30
|
||||||
|
#define DISP_CNT 30
|
||||||
|
|
||||||
|
//////////////////////////////////////////////////////////////
|
||||||
|
//базовые значения основных параметров
|
||||||
|
#define BASE_SERIAL_NUM 0x4001
|
||||||
|
#define BASE_MASTER_ADR 0x1001
|
||||||
|
#define BASE_MESH_ADR BASE_SERIAL_NUM//пока он совпадает с серийным номером
|
||||||
|
#define BASE_MESH_ID 0x1313
|
||||||
|
#define BASE_PASSWORD 777777
|
||||||
|
|
||||||
|
//максимальный и минимальный серийник
|
||||||
|
#define MIN_SERIAL_NUM 0x4000
|
||||||
|
#define MAX_SERIAL_NUM 0x4FFF
|
||||||
|
//максимальный и минимальный id сети
|
||||||
|
#define MIN_MESH_ID 0x0000
|
||||||
|
#define MAX_MESH_ID 0xFFFF
|
||||||
|
//максимальный и минимальный адрес мастера(адрес куда мы шлём сообщения) сети
|
||||||
|
#define MIN_MESH_MASTER_ID 0x0000
|
||||||
|
#define MAX_MESH_MASTER_ID 0xFFFF
|
||||||
|
//минимально и максимально возможный пароль
|
||||||
|
#define MIN_PASS 0
|
||||||
|
#define MAX_PASS 999999
|
||||||
|
//////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
|
//////////////////////////////////////////////////////////////
|
||||||
|
//базовые значения ФПГ
|
||||||
|
#define HAND_WAIT 1000//100 5c примерно ждем устаканивания сигнала
|
||||||
|
#define HR_HIGH 16000
|
||||||
|
#define HR_LOW 4000
|
||||||
|
#define HR_WAIT 600//600 3c примерно ждем устаканивания сигнала
|
||||||
|
#define AFE_AMB_TRESHOLD -10000 //пороговое значение, выше которого мы считаем что часы сняты.
|
||||||
|
|
||||||
|
//максимальные и минимальные значения верхнего порога чсс
|
||||||
|
#define HR_HIGH_MIN 10000 //100-240 уд\мин
|
||||||
|
#define HR_HIGH_MAX 24000
|
||||||
|
//максимальные и минимальные значения нижнего порога чсс
|
||||||
|
#define HR_LOW_MIN 4000 //40-99 уд\мин
|
||||||
|
#define HR_LOW_MAX 9900
|
||||||
|
//максимальные и минимальные значения времени тревоги по поводу ЧСС
|
||||||
|
#define HR_WAIT_MIN 0 //0-10 сек
|
||||||
|
#define HR_WAIT_MAX 2000
|
||||||
|
//////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
|
//////////////////////////////////////////////////////////////
|
||||||
|
//пороги акселерометра базовые
|
||||||
|
#define LOW_G_TRES 300 //порог от которого считаем падении
|
||||||
|
#define LOW_G_TIME 12 //0.05сек сколько должно длится это состояние
|
||||||
|
#define LOW_G_ALARM_TIME 750 //3сек сколько сигналим о тревоге*/
|
||||||
|
|
||||||
|
#define HIGH_G_TRES 8000 //порог от которого считаем удар
|
||||||
|
#define HIGH_G_ALARM_TIME 750 //3сек сколько сигналим о тревоге
|
||||||
|
|
||||||
|
//максимальные и минимальные значения порога свободного падения
|
||||||
|
#define LOW_G_TRES_MIN 10//10-1000mg
|
||||||
|
#define LOW_G_TRES_MAX 1000
|
||||||
|
//максимальные и минимальные значения времени свободного падения для срабатывания тревоги
|
||||||
|
#define LOW_G_TIME_MIN 2//10мс-500мс
|
||||||
|
#define LOW_G_TIME_MAX 100
|
||||||
|
//максимальные и минимальные значения времени тревоги по поводу свободного падения
|
||||||
|
#define LOW_G_ALARM_TIME_MIN 0//0-10 сек
|
||||||
|
#define LOW_G_ALARM_TIME_MAX 2000
|
||||||
|
//максимальные и минимальные значения порога высокого ускорения (удара)
|
||||||
|
#define HIGH_G_TRES_MIN 2000//2000-12000mg
|
||||||
|
#define HIGH_G_TRES_MAX 12000
|
||||||
|
//максимальные и минимальные значения времени тревоги по поводу высокого ускорения (удара)
|
||||||
|
#define HIGH_G_ALARM_TIME_MIN 0//0-10 сек
|
||||||
|
#define HIGH_G_ALARM_TIME_MAX 2000
|
||||||
|
//////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
|
//////////////////////////////////////////////////////////////
|
||||||
|
//пороги термометра базовые
|
||||||
|
#define TEMP_LOW 3000//20*сек
|
||||||
|
#define TEMP_HIGH 3400//20*сек
|
||||||
|
#define TEMP_WAIT 2//20*сек
|
||||||
|
//максимальные и минимальные значения низкой температуры
|
||||||
|
#define TEMP_LOW_MIN 2800//28-33.5гр
|
||||||
|
#define TEMP_LOW_MAX 3350
|
||||||
|
//максимальные и минимальные значения высокой температуры
|
||||||
|
#define TEMP_HIGH_MIN 3360//33.6-38гр
|
||||||
|
#define TEMP_HIGH_MAX 3800
|
||||||
|
//максимальные и минимальные значения времени тревоги
|
||||||
|
#define TEMP_WAIT_MIN 0//20*сек
|
||||||
|
#define TEMP_WAIT_MAX 200
|
||||||
|
|
||||||
|
//////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//режим работы
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
None = 0x0,//технический когда ничего не загрузилось
|
||||||
|
StartUP = 0x1,//технический режим включения инициализация всего и вся, проверка оборудования
|
||||||
|
SetUP = 0x2,//технический режим настройки параметров и записи их в память, если не выйдет сделать это в потоке
|
||||||
|
Stream = 0x3,//потоковая передача данных без анализа тупо 3 канала как сейчас можно со счётчиком
|
||||||
|
Analise = 0x4,//передача данных + анализ
|
||||||
|
HV_stimul = 0x5,//и то и то
|
||||||
|
USB_mode = 0x6, //режим чтения файлов и их передача на ПК в этом режиме нужно отрубать все датчики.
|
||||||
|
Sleep = 0x7 // технический режим требуется для прехода в сон и всё
|
||||||
|
} work_mode;
|
||||||
|
|
||||||
|
|
||||||
|
//режим BLE
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
ble_off = 0x0,//выключен4300
|
||||||
|
ble_raw = 0x1,//передаем сырые данные
|
||||||
|
ble_mesh = 0x2,//обмен сообщениями в mesh сети медлено, но надежно
|
||||||
|
} ble_mode;
|
||||||
|
|
||||||
|
typedef struct Contr
|
||||||
|
{
|
||||||
|
work_mode set_mode; //какой режим выставлен
|
||||||
|
work_mode now_mode; //какой режим сейчас
|
||||||
|
bool btn_1_state;//состояние кнопки 1
|
||||||
|
int btn_1_cnt; //счетчик кнопки 1
|
||||||
|
bool btn_2_state;//состояние кнопки 2
|
||||||
|
int btn_2_cnt;
|
||||||
|
//это по идее не нужно
|
||||||
|
int Ecount; //подсчёт ошибок
|
||||||
|
int timer;
|
||||||
|
bool interupt; //флаг
|
||||||
|
uint32_t rf_counter; //подсчёт отправленных сообщений
|
||||||
|
uint8_t mesh_counter;//подсчёт отправленных сообщений
|
||||||
|
//new
|
||||||
|
|
||||||
|
bool DATA_write; //флаг что вообще нужно данные писать.
|
||||||
|
ble_mode ble_mode_set; //режим работы BLE
|
||||||
|
ble_mode ble_mode_now; //режим работы BLE
|
||||||
|
|
||||||
|
//по идее от сюда идет только настройка параметров выше нет смысла записывать данные
|
||||||
|
//настройки внутренних параметров
|
||||||
|
bool dev_type; //что это за устройство неизменяемый параметр 0 ЭКГ 1 часы
|
||||||
|
int serial_number; //серийный номер устройства
|
||||||
|
int password; //пароль нужен для серийного режима.
|
||||||
|
int mesh_netid; //номер сети для MESH режима
|
||||||
|
int mesh_adr; //адрес в сети при режиме mesh
|
||||||
|
int master_adr; //адрес куда отправлять данные в сети при режиме mesh
|
||||||
|
bool ble_ask; //мужно ли подтвержденеи отпрваки в режиме mesh
|
||||||
|
|
||||||
|
//настройки порогов для переферии
|
||||||
|
//пороги ФПГ
|
||||||
|
int32_t ppg_hand_wait;//200 = 1c сколько ждем устаканивания сигнала
|
||||||
|
int32_t ppg_hr_high;
|
||||||
|
int32_t ppg_hr_low;
|
||||||
|
int32_t ppg_hr_wait;//600 = 3c время сигнализирования ошибки
|
||||||
|
int32_t ppg_hr_amd_tres;//пороговое значение, выше которого мы считаем что часы сняты.
|
||||||
|
//акселерометры
|
||||||
|
int16_t mpu_low_g_tres;//порог от которого считаем падение
|
||||||
|
int32_t mpu_low_g_time;//время в низком G для срабатывания триггера
|
||||||
|
int32_t mpu_low_g_Alarm_Tim;//Время в течении которого тревога активна 1 секунда = 250
|
||||||
|
int16_t mpu_high_g_tres;//порог от которого считаем удар
|
||||||
|
int32_t mpu_high_g_Alarm_Tim;//Время в течении которого тревога активна 1 секунда = 250
|
||||||
|
//термометр
|
||||||
|
int16_t temp_low_tres; //порог от которого считаем низкую температуру
|
||||||
|
int16_t temp_high_tres; //порог от которого считаем что температура высокая
|
||||||
|
int32_t temp_alarm_time;//Время в течении которого тревога активна 1 секунда = 20
|
||||||
|
|
||||||
|
} ctrl_struct;
|
||||||
|
|
||||||
|
void control_init(void);
|
||||||
|
void control_init_var(ctrl_struct * control);
|
||||||
|
void lets_sleep(void);
|
||||||
|
void FL_read_str(ctrl_struct * control);
|
||||||
|
void FL_write_str(ctrl_struct * control);
|
||||||
|
uint8_t FL_read_byte(uint32_t addr);
|
||||||
|
|
||||||
|
int update_str(ctrl_struct * buf_str,ctrl_struct * main_str);
|
||||||
|
int scan_str_USB(char* mess);
|
||||||
|
|
||||||
|
void new_app_start();//go to usb msd
|
||||||
|
#endif
|
||||||
52
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/dma.h
Normal file
52
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/dma.h
Normal file
@ -0,0 +1,52 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file dma.h
|
||||||
|
* @brief This file contains all the function prototypes for
|
||||||
|
* the dma.c file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __DMA_H__
|
||||||
|
#define __DMA_H__
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* DMA memory to memory transfer handles -------------------------------------*/
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_DMA_Init(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
|
||||||
|
/* USER CODE END Prototypes */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __DMA_H__ */
|
||||||
|
|
||||||
@ -0,0 +1,9 @@
|
|||||||
|
#ifndef _FILTER_H
|
||||||
|
#define _FILTER_H
|
||||||
|
|
||||||
|
float iir_50hz_2or(float NewSample);//50hz 2 order
|
||||||
|
float iir_50hz_1or(float NewSample);//50hz 1 order
|
||||||
|
float iir_hp(float NewSample);//hifh pass 1 order 1hz shit
|
||||||
|
float iir_4060(float NewSample);
|
||||||
|
float iir_lp30(float NewSample);
|
||||||
|
#endif
|
||||||
49
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/gpio.h
Normal file
49
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/gpio.h
Normal file
@ -0,0 +1,49 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file gpio.h
|
||||||
|
* @brief This file contains all the function prototypes for
|
||||||
|
* the gpio.c file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __GPIO_H__
|
||||||
|
#define __GPIO_H__
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_GPIO_Init(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
|
||||||
|
/* USER CODE END Prototypes */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /*__ GPIO_H__ */
|
||||||
|
|
||||||
287
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/icd.h
Normal file
287
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/icd.h
Normal file
@ -0,0 +1,287 @@
|
|||||||
|
#ifndef _ICD
|
||||||
|
#define _ICD
|
||||||
|
#include "main.h"
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include "cmsis_os.h"
|
||||||
|
#include "adc.h"
|
||||||
|
//Глобальные настройки, делаем их неизменными
|
||||||
|
#define F103 0
|
||||||
|
#define F412 1
|
||||||
|
#define MK_TYPE F103
|
||||||
|
|
||||||
|
#define LAMP true//увеличенное время разряда
|
||||||
|
#define SPI_MODE true//с фронт энда берём данные
|
||||||
|
#define ACTIVE_CH 1//с фронт энда берём данные
|
||||||
|
#define CAP_VOLT_CTRL true//нужен ли контроль реального напряжения на конденсаторе
|
||||||
|
|
||||||
|
#define CAPACITY 0.000470
|
||||||
|
#define FORCE_DELAY 100 //Задержка МС после зарядки конденсатора в принудительном режиме
|
||||||
|
#define DANGER_HV true //чтобы риту не ёбнуло если 1 значит по реальному заряжаем
|
||||||
|
#define FILTER true //нужен ли фнч может флаг?
|
||||||
|
|
||||||
|
#define RG 1000.0//сопротивление резистора в омах
|
||||||
|
|
||||||
|
#define VOLT_COEF 3300.0/(4096*(1 + 100000.0/RG))
|
||||||
|
#define VOLT_COEF_MAX30003 0.000005
|
||||||
|
//по даташиту G = 1 + (100 kΩ / RG(1000 у нас)) G = 101
|
||||||
|
//перевод остч тов в вольты 3.3/4096
|
||||||
|
// Х*3.3/(4096*(1 + 100000.0/RG)) это сколько вольт у нас
|
||||||
|
#define MOV_AV_COEF 0.02//коэффициет скользящего среднего
|
||||||
|
|
||||||
|
#define MIN_TRES 0.5
|
||||||
|
#define MAX_TRES 3.0
|
||||||
|
|
||||||
|
#define DATA_RATE 200
|
||||||
|
//время для стабилизации сигналов когда ничего не происходит
|
||||||
|
#define ALL_TIME_MS 1500
|
||||||
|
#define START_UP_TIME_MS 2000
|
||||||
|
#define SEARCH_BASE_TIME_MS 700
|
||||||
|
#define SEARCH_MAX_TIME_MS 125
|
||||||
|
#define SQUARE_TIME_MS 400
|
||||||
|
#define TRIANGLE_TIME_MS 300
|
||||||
|
#define TRIANGLE_STEP_TIME_MS 50
|
||||||
|
#define LV_TIME_MS 200
|
||||||
|
#define LV_START_TIME_MS 5
|
||||||
|
#define LV_STOP_TIME_MS 50
|
||||||
|
|
||||||
|
#define SQUARE_COEF 0.5
|
||||||
|
#define TRIANGLE_COEF 0.85
|
||||||
|
|
||||||
|
#define TERAPY_TRES 10//сколько нужно единичных фибриляций для терапии
|
||||||
|
|
||||||
|
// Период 0 - FIBR_PERIOD считаем фибриляцией
|
||||||
|
#define FIBR_PERIOD 250
|
||||||
|
#define FIBR_PERIOD_MIN 250
|
||||||
|
#define FIBR_PERIOD_MAX 350
|
||||||
|
// Период FIBR_PERIOD - TACHY_2_PERIOD считаем тахикардией глубокой
|
||||||
|
#define TACHY_2_PERIOD 350
|
||||||
|
#define TACHY_2_PERIOD_MIN 300
|
||||||
|
#define TACHY_2_PERIOD_MAX 400
|
||||||
|
// Период TACHY_2_PERIOD - TACHY_1_PERIOD считаем тахикардией неглубокой
|
||||||
|
#define TACHY_1_PERIOD 400
|
||||||
|
#define TACHY_1_PERIOD_MIN 350
|
||||||
|
#define TACHY_1_PERIOD_MAX 450
|
||||||
|
|
||||||
|
// в десятых джоуля
|
||||||
|
#define MIN_ENERGY 50
|
||||||
|
#define MAX_ENERGY 400
|
||||||
|
//сколько шагов должно быть в терапии
|
||||||
|
#define HV_STEP_NUM 6
|
||||||
|
//время в мс когда мы слепы
|
||||||
|
#define HV_BLIND_TIME_MS 1500
|
||||||
|
// размер буффера редетекции
|
||||||
|
#define REDET_BUF_LEN 8
|
||||||
|
// сколько нужно плохих периодов для продолжения терапии
|
||||||
|
#define REDET_BAD_MAX 4
|
||||||
|
|
||||||
|
#define STANDBY_TIME_MS 10*1000//пусть будет 10 секунд
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
Monitor = 0, // Тупо смотрим
|
||||||
|
Normal = 1, // поиск порогов и терапия
|
||||||
|
Force = 2 // только терапия похуй на сигнал
|
||||||
|
} main_mode;
|
||||||
|
|
||||||
|
|
||||||
|
//режим поиска пиков 3 байта
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
Mode_start_UP = 0, // тупо накапливаем среднее секунды 3 чтоб никого случайно током не ударить
|
||||||
|
Mode_search_BASE = 1, // поиск по нижнему порогу из памяти
|
||||||
|
Mode_search_SQUARE = 2, // поиск 300-400 мс по прошлый порог*коэффициент
|
||||||
|
Mode_search_TRIANGLE = 3, // поиск в режиме треугольников
|
||||||
|
Mode_search_MAX = 4, // режим поиска максимума Vsense
|
||||||
|
Mode_stimulation_LV = 5, // нет пиков стимулируем низким напряжением и не анализируем заданное время в Mode_search_BASE?
|
||||||
|
Mode_stimulation_HV = 6 // отключаем вход чтобы не улетела скользящее среднее
|
||||||
|
// Mode_stimulation_HV = 6 // Обнаружили фибриляцию начали заряжать конденсатор(возможно это над режим т.к. в нём мы тоже ищем пики)
|
||||||
|
} search_mode;
|
||||||
|
|
||||||
|
//режимы терапии 2 байта
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
Terapy_off = 0, // активна при тупом поиске корзин
|
||||||
|
Terapy_fibr = 1, // терапия фибриляции
|
||||||
|
Terapy_tachy_2 = 2, // терапия сильной тахикардии
|
||||||
|
Terapy_tachy_1 = 3 // терапия слабой тахикардии
|
||||||
|
} terapy_mode;
|
||||||
|
|
||||||
|
//подрежимы терапии 3 байта
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
sub_off = 0, // неактивный
|
||||||
|
sub_cap_ch = 1, // зарядка конденсатора
|
||||||
|
sub_redet = 2, // редетекция
|
||||||
|
sub_shock = 3, // удар током + время слепоты
|
||||||
|
sub_stim_fail = 4 // провели стимуляцию, но не помогло
|
||||||
|
} terapy_sub_mode;
|
||||||
|
|
||||||
|
|
||||||
|
//тип для события, каким он может быть 2 байта
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
Vsense = 0, // нормальное сокращение
|
||||||
|
Vpace = 1, // пришлось стимулировать сейчас не используем
|
||||||
|
Vnoise = 2, // шумы в QRS комплексе(пока не реализовали)
|
||||||
|
} QRS_type;
|
||||||
|
|
||||||
|
//тип для события, каким он может быть 2 байта
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
cap_poz = 0, // позитивная полярность сигнала(только её пока можем)
|
||||||
|
cap_neg = 1, // негативная полярность сигнала(на старом железе нельзя)
|
||||||
|
cap_bi = 2, // сначала позитивная потом негативная
|
||||||
|
} cap_polarity;
|
||||||
|
|
||||||
|
//тип для RR интервала
|
||||||
|
typedef struct icd_str
|
||||||
|
{
|
||||||
|
main_mode work_set_mode; //режим
|
||||||
|
main_mode work_now_mode; //режим
|
||||||
|
|
||||||
|
search_mode search_set_mode; //режим
|
||||||
|
search_mode search_now_mode; //режим
|
||||||
|
bool filter_on;//фильтр активен
|
||||||
|
uint8_t active_ch;//какой канал используем 0-3 0 это spi
|
||||||
|
bool sd_card;//используем ли мы SD карту?
|
||||||
|
bool dc_cut;//стираем ли мы постоянную составляющую
|
||||||
|
|
||||||
|
bool rr_now;//сейчас сокращение сердца
|
||||||
|
//минимальный и максимальный пороги с плав. точкой и инт в десятых миливольта
|
||||||
|
float min_tres;
|
||||||
|
uint8_t min_tres_d;
|
||||||
|
float max_tres;
|
||||||
|
uint8_t max_tres_d;
|
||||||
|
// коэффициент на который умножается сигнал при переход в режим квадратов
|
||||||
|
float square_coef;
|
||||||
|
uint8_t square_coef_d;
|
||||||
|
// коэффициент на который умножается сигнал на каждой ступени в режиме треугольников
|
||||||
|
float triangle_coef;
|
||||||
|
uint8_t triangle_coef_d;
|
||||||
|
|
||||||
|
// счётчик режимов чтобы не задерживаться слишком долго в одном режиме
|
||||||
|
uint16_t mode_cnt;
|
||||||
|
// время слепоты при включении
|
||||||
|
uint16_t start_up_time;
|
||||||
|
// время поиска в базовом режиме с минимальным порогом
|
||||||
|
uint16_t base_time;
|
||||||
|
// Время в мс которое алгоритм ищет максимум
|
||||||
|
uint16_t max_search_time;
|
||||||
|
|
||||||
|
// Время в мс нахождения в режиме поиска квадратов
|
||||||
|
uint16_t square_time;
|
||||||
|
|
||||||
|
// время на весь режим треугольников
|
||||||
|
uint16_t triangle_time;
|
||||||
|
// время каждой ступени в режиме треугольников
|
||||||
|
uint16_t triangle_step_time;
|
||||||
|
|
||||||
|
// Время в мс которое длится режим стимуляции низким напряжением
|
||||||
|
uint16_t lv_mode_time;
|
||||||
|
// это во моногом эрзац.
|
||||||
|
uint16_t lv_start_time; //во сколько начали выдавать импульс
|
||||||
|
uint16_t lv_stop_time; //во сколько закончили выдавать импульс
|
||||||
|
|
||||||
|
uint16_t max_time; //сколько отведено на весь QRS комплекс
|
||||||
|
|
||||||
|
// тип последнего определённого события
|
||||||
|
QRS_type last_QRS;
|
||||||
|
// время между последним и предпоследним событием
|
||||||
|
uint16_t last_period;
|
||||||
|
|
||||||
|
|
||||||
|
float last_RR_amp;// переменная в которой храним амплитуды начала QRS#
|
||||||
|
int32_t last_RR_poz;//переменная в котором храним положение начала QRS#
|
||||||
|
int16_t last_RR_poz_rel;//переменная в которой храним относительное положение начала QRS
|
||||||
|
|
||||||
|
// Счётчики нужны для алгоритма терапии Михаила
|
||||||
|
uint32_t Vs_cnt;//счётчик собственных сокращений сердца
|
||||||
|
uint32_t Vn_cnt;//счётчик собственных сокращений которые в шуме(не детектируется пока fixme)
|
||||||
|
uint32_t Vp_cnt;//счётчик принудительных стимуляций сердца низким напряжением(низковольтная стимуляция)
|
||||||
|
|
||||||
|
bool LV_on;// реально стимулируем низковольтно
|
||||||
|
bool HV_on;// реально стимулируем высоковольтно
|
||||||
|
|
||||||
|
int32_t counter;
|
||||||
|
float ecg_rv_filt; //экг в миливольтах для врачей
|
||||||
|
float ecg_rv_mov_av; //скользящее среднее для вычитания постоянной составляющей из сигнала
|
||||||
|
float ecg_rv_pos_sig; //сигнал из которого вычтена постоянная сост. и взят модуль
|
||||||
|
float ecg_rv_din_treshold;//динамический порог
|
||||||
|
|
||||||
|
// тут уже корзины
|
||||||
|
//порог периода фибриляции если период меньше, чем это число это фибриляция
|
||||||
|
uint16_t fibr_tres;
|
||||||
|
//порог периода Тахикардии 2 если период меньше, чем это число это Тахикардия 2
|
||||||
|
uint16_t tachy_2_tres;
|
||||||
|
//порог периода Тахикардии 1 если период меньше, чем это число это Тахикардия 1
|
||||||
|
uint16_t tachy_1_tres;
|
||||||
|
|
||||||
|
uint32_t vs_cnt_last;//сбрасываемый счётчик Vs событий
|
||||||
|
uint16_t filt_period;//фильтрованный скользящим средним период
|
||||||
|
uint8_t fibr_cnt; //счётчик фибриляции при обнаружении короткого RR он растёт
|
||||||
|
uint8_t tachy_2_cnt; //счётчик Тахикардии 2 при обнаружении короткого RR он растёт
|
||||||
|
uint8_t tachy_1_cnt; //счётчик Тахикардии 1 при обнаружении короткого RR он растёт
|
||||||
|
uint8_t norm_cnt; //счётчик событий c нормальным ЧСС при достижении 5 сбрасываем все корзины
|
||||||
|
|
||||||
|
uint32_t vp_cnt_last;//сбрасываемый счётчик Vs событий нужен при редетекции сергей сказал что Vp достаточно для выхода из режима
|
||||||
|
uint8_t fibr_max_tres; //порог счётчика фибриляций при котором начинаем терапию
|
||||||
|
|
||||||
|
/////////////////////////////////////////////////////
|
||||||
|
///// терапия /////
|
||||||
|
/////////////////////////////////////////////////////
|
||||||
|
terapy_mode terapy_set;//заданный режим терапии
|
||||||
|
terapy_mode terapy_now;//текущий режим терапии
|
||||||
|
|
||||||
|
terapy_sub_mode sub_mode;//подрежим для индикации
|
||||||
|
|
||||||
|
uint8_t hv_step_number;//сколько шагов ВВ терапии?
|
||||||
|
uint8_t hv_step_cnt;// какой сейчас шаг?
|
||||||
|
|
||||||
|
uint16_t hv_step_energy;//сколько джоулей в одном шаге считаем в зависимости от минимума и максимума.
|
||||||
|
uint16_t min_energy;
|
||||||
|
uint16_t now_energy;
|
||||||
|
uint16_t max_energy;
|
||||||
|
cap_polarity cap_pol;//поляроность конденсатора
|
||||||
|
|
||||||
|
uint16_t hv_blind_time;//время которое мы слепы после HV разряда
|
||||||
|
|
||||||
|
uint8_t redet_num; //какой длинны мы заполныем буффер при редетекции
|
||||||
|
uint8_t redet_bad; //сколько нам нужно плохих событий для запуска терапии
|
||||||
|
uint8_t redet_cnt; //сколько всего событий в редетекции
|
||||||
|
uint8_t redet_bad_cnt; //сколько реально плохих событий
|
||||||
|
|
||||||
|
uint32_t standby_timer;//сколько отдыхать после неудачного подавления фибриляции
|
||||||
|
|
||||||
|
uint8_t com_buf[20];
|
||||||
|
|
||||||
|
uint8_t spi_pot_set;//spi резистор для задания КУ
|
||||||
|
uint8_t spi_pot_now;//spi резистор для задания КУ
|
||||||
|
} icd_str;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
float my_abs(float a);
|
||||||
|
void get_data(icd_str * icd_str,uint16_t input);
|
||||||
|
void get_data_max30003(icd_str * icd_str,int32_t input);
|
||||||
|
|
||||||
|
void init_icd(icd_str * icd_str);
|
||||||
|
bool mode_start(icd_str * icd_str);
|
||||||
|
bool check_mode_len(icd_str * icd_str,uint16_t base_time, search_mode mode_to_set);
|
||||||
|
bool check_tres(icd_str * icd_str);
|
||||||
|
void search_alg(icd_str * icd_str);
|
||||||
|
uint16_t moving_avarage(uint16_t data);
|
||||||
|
void basket_alg(icd_str * icd_str);
|
||||||
|
|
||||||
|
void hv_charge(icd_str * icd_str);
|
||||||
|
//функция плавного разряда Конденсатора
|
||||||
|
void hv_discharge(icd_str * icd_str);
|
||||||
|
//функция резкого разряда
|
||||||
|
void hv_shock(icd_str * icd_str);
|
||||||
|
|
||||||
|
void terapy_algorithm(icd_str * icd_str);
|
||||||
|
void hv_pwm(bool state);
|
||||||
|
|
||||||
|
|
||||||
|
#endif
|
||||||
83
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/main.h
Normal file
83
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/main.h
Normal file
@ -0,0 +1,83 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file : main.h
|
||||||
|
* @brief : Header for main.c file.
|
||||||
|
* This file contains the common defines of the application.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __MAIN_H
|
||||||
|
#define __MAIN_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f1xx_hal.h"
|
||||||
|
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN ET */
|
||||||
|
|
||||||
|
/* USER CODE END ET */
|
||||||
|
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EC */
|
||||||
|
|
||||||
|
/* USER CODE END EC */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EM */
|
||||||
|
|
||||||
|
/* USER CODE END EM */
|
||||||
|
|
||||||
|
/* Exported functions prototypes ---------------------------------------------*/
|
||||||
|
void Error_Handler(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN EFP */
|
||||||
|
|
||||||
|
/* USER CODE END EFP */
|
||||||
|
|
||||||
|
/* Private defines -----------------------------------------------------------*/
|
||||||
|
#define LED_Pin GPIO_PIN_3
|
||||||
|
#define LED_GPIO_Port GPIOA
|
||||||
|
#define BLE_PWR_Pin GPIO_PIN_11
|
||||||
|
#define BLE_PWR_GPIO_Port GPIOA
|
||||||
|
#define BLE_PWRC_Pin GPIO_PIN_12
|
||||||
|
#define BLE_PWRC_GPIO_Port GPIOA
|
||||||
|
#define V9_5_EN_Pin GPIO_PIN_15
|
||||||
|
#define V9_5_EN_GPIO_Port GPIOA
|
||||||
|
#define HV_PWR_EN_Pin GPIO_PIN_4
|
||||||
|
#define HV_PWR_EN_GPIO_Port GPIOB
|
||||||
|
#define HV_DIS_Pin GPIO_PIN_5
|
||||||
|
#define HV_DIS_GPIO_Port GPIOB
|
||||||
|
#define HV_SHOCK_Pin GPIO_PIN_8
|
||||||
|
#define HV_SHOCK_GPIO_Port GPIOB
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __MAIN_H */
|
||||||
@ -0,0 +1,5 @@
|
|||||||
|
#ifndef _PARSE_H
|
||||||
|
#define _PARSE_H
|
||||||
|
#include "icd.h"
|
||||||
|
void parse_command(uint8_t* buf, icd_str * icd_str);
|
||||||
|
#endif
|
||||||
@ -0,0 +1,391 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f1xx_hal_conf.h
|
||||||
|
* @brief HAL configuration file.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F1xx_HAL_CONF_H
|
||||||
|
#define __STM32F1xx_HAL_CONF_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* ########################## Module Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief This is the list of modules to be used in the HAL driver
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define HAL_MODULE_ENABLED
|
||||||
|
#define HAL_ADC_MODULE_ENABLED
|
||||||
|
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||||
|
/*#define HAL_CAN_MODULE_ENABLED */
|
||||||
|
/*#define HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||||
|
/*#define HAL_CEC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_CORTEX_MODULE_ENABLED */
|
||||||
|
/*#define HAL_CRC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_DAC_MODULE_ENABLED */
|
||||||
|
#define HAL_DMA_MODULE_ENABLED
|
||||||
|
/*#define HAL_ETH_MODULE_ENABLED */
|
||||||
|
/*#define HAL_FLASH_MODULE_ENABLED */
|
||||||
|
#define HAL_GPIO_MODULE_ENABLED
|
||||||
|
/*#define HAL_I2C_MODULE_ENABLED */
|
||||||
|
/*#define HAL_I2S_MODULE_ENABLED */
|
||||||
|
/*#define HAL_IRDA_MODULE_ENABLED */
|
||||||
|
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||||
|
/*#define HAL_NOR_MODULE_ENABLED */
|
||||||
|
/*#define HAL_NAND_MODULE_ENABLED */
|
||||||
|
/*#define HAL_PCCARD_MODULE_ENABLED */
|
||||||
|
/*#define HAL_PCD_MODULE_ENABLED */
|
||||||
|
/*#define HAL_HCD_MODULE_ENABLED */
|
||||||
|
/*#define HAL_PWR_MODULE_ENABLED */
|
||||||
|
/*#define HAL_RCC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_RTC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SD_MODULE_ENABLED */
|
||||||
|
/*#define HAL_MMC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SDRAM_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SPI_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||||
|
#define HAL_TIM_MODULE_ENABLED
|
||||||
|
#define HAL_UART_MODULE_ENABLED
|
||||||
|
/*#define HAL_USART_MODULE_ENABLED */
|
||||||
|
/*#define HAL_WWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#define HAL_CORTEX_MODULE_ENABLED
|
||||||
|
#define HAL_DMA_MODULE_ENABLED
|
||||||
|
#define HAL_FLASH_MODULE_ENABLED
|
||||||
|
#define HAL_EXTI_MODULE_ENABLED
|
||||||
|
#define HAL_GPIO_MODULE_ENABLED
|
||||||
|
#define HAL_PWR_MODULE_ENABLED
|
||||||
|
#define HAL_RCC_MODULE_ENABLED
|
||||||
|
|
||||||
|
/* ########################## Oscillator Values adaptation ####################*/
|
||||||
|
/**
|
||||||
|
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSE is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||||
|
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
|
||||||
|
#endif /* HSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal High Speed oscillator (HSI) value.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSI is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal Low Speed oscillator (LSI) value.
|
||||||
|
*/
|
||||||
|
#if !defined (LSI_VALUE)
|
||||||
|
#define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */
|
||||||
|
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||||
|
The real value may vary depending on the variations
|
||||||
|
in voltage and temperature. */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief External Low Speed oscillator (LSE) value.
|
||||||
|
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||||
|
*/
|
||||||
|
#if !defined (LSE_VALUE)
|
||||||
|
#define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
|
||||||
|
#endif /* LSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||||
|
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||||
|
#endif /* LSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||||
|
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||||
|
|
||||||
|
/* ########################### System Configuration ######################### */
|
||||||
|
/**
|
||||||
|
* @brief This is the HAL system configuration section
|
||||||
|
*/
|
||||||
|
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||||
|
#define TICK_INT_PRIORITY 15U /*!< tick interrupt priority (lowest by default) */
|
||||||
|
#define USE_RTOS 0U
|
||||||
|
#define PREFETCH_ENABLE 1U
|
||||||
|
|
||||||
|
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||||
|
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
|
||||||
|
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||||
|
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||||
|
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||||
|
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||||
|
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||||
|
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||||
|
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||||
|
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||||
|
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||||
|
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
|
||||||
|
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||||
|
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||||
|
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||||
|
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||||
|
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||||
|
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||||
|
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||||
|
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||||
|
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||||
|
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||||
|
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||||
|
|
||||||
|
/* ########################## Assert Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||||
|
* HAL drivers code
|
||||||
|
*/
|
||||||
|
#define USE_FULL_ASSERT 1U
|
||||||
|
|
||||||
|
/* ################## Ethernet peripheral configuration ##################### */
|
||||||
|
|
||||||
|
/* Section 1 : Ethernet peripheral configuration */
|
||||||
|
|
||||||
|
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
|
||||||
|
#define MAC_ADDR0 2U
|
||||||
|
#define MAC_ADDR1 0U
|
||||||
|
#define MAC_ADDR2 0U
|
||||||
|
#define MAC_ADDR3 0U
|
||||||
|
#define MAC_ADDR4 0U
|
||||||
|
#define MAC_ADDR5 0U
|
||||||
|
|
||||||
|
/* Definition of the Ethernet driver buffers size and count */
|
||||||
|
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||||
|
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||||
|
#define ETH_RXBUFNB 8U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||||
|
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||||
|
|
||||||
|
/* Section 2: PHY configuration section */
|
||||||
|
|
||||||
|
/* DP83848_PHY_ADDRESS Address*/
|
||||||
|
#define DP83848_PHY_ADDRESS 0x01U
|
||||||
|
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||||
|
#define PHY_RESET_DELAY 0x000000FFU
|
||||||
|
/* PHY Configuration delay */
|
||||||
|
#define PHY_CONFIG_DELAY 0x00000FFFU
|
||||||
|
|
||||||
|
#define PHY_READ_TO 0x0000FFFFU
|
||||||
|
#define PHY_WRITE_TO 0x0000FFFFU
|
||||||
|
|
||||||
|
/* Section 3: Common PHY Registers */
|
||||||
|
|
||||||
|
#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
|
||||||
|
#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
|
||||||
|
|
||||||
|
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
|
||||||
|
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
|
||||||
|
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
|
||||||
|
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
|
||||||
|
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
|
||||||
|
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
|
||||||
|
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
|
||||||
|
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
|
||||||
|
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
|
||||||
|
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
|
||||||
|
|
||||||
|
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
|
||||||
|
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
|
||||||
|
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
|
||||||
|
|
||||||
|
/* Section 4: Extended PHY Registers */
|
||||||
|
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
|
||||||
|
|
||||||
|
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||||
|
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||||
|
|
||||||
|
/* ################## SPI peripheral configuration ########################## */
|
||||||
|
|
||||||
|
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||||
|
* Activated: CRC code is present inside driver
|
||||||
|
* Deactivated: CRC code cleaned from driver
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USE_SPI_CRC 0U
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
/**
|
||||||
|
* @brief Include module's header file
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_RCC_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_rcc.h"
|
||||||
|
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_gpio.h"
|
||||||
|
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_exti.h"
|
||||||
|
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DMA_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_dma.h"
|
||||||
|
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ETH_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_eth.h"
|
||||||
|
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CAN_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_can.h"
|
||||||
|
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||||
|
#include "Legacy/stm32f1xx_hal_can_legacy.h"
|
||||||
|
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CEC_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_cec.h"
|
||||||
|
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_cortex.h"
|
||||||
|
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ADC_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_adc.h"
|
||||||
|
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRC_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_crc.h"
|
||||||
|
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DAC_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_dac.h"
|
||||||
|
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_flash.h"
|
||||||
|
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_sram.h"
|
||||||
|
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_NOR_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_nor.h"
|
||||||
|
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2C_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_i2c.h"
|
||||||
|
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2S_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_i2s.h"
|
||||||
|
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_iwdg.h"
|
||||||
|
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PWR_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_pwr.h"
|
||||||
|
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RTC_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_rtc.h"
|
||||||
|
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_pccard.h"
|
||||||
|
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SD_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_sd.h"
|
||||||
|
#endif /* HAL_SD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_NAND_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_nand.h"
|
||||||
|
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SPI_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_spi.h"
|
||||||
|
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_TIM_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_tim.h"
|
||||||
|
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_UART_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_uart.h"
|
||||||
|
#endif /* HAL_UART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_USART_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_usart.h"
|
||||||
|
#endif /* HAL_USART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_irda.h"
|
||||||
|
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_smartcard.h"
|
||||||
|
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_wwdg.h"
|
||||||
|
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PCD_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_pcd.h"
|
||||||
|
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_HCD_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_hcd.h"
|
||||||
|
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_MMC_MODULE_ENABLED
|
||||||
|
#include "stm32f1xx_hal_mmc.h"
|
||||||
|
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
/**
|
||||||
|
* @brief The assert_param macro is used for function's parameters check.
|
||||||
|
* @param expr If expr is false, it calls assert_failed function
|
||||||
|
* which reports the name of the source file and the source
|
||||||
|
* line number of the call that failed.
|
||||||
|
* If expr is true, it returns no value.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||||
|
/* Exported functions ------------------------------------------------------- */
|
||||||
|
void assert_failed(uint8_t* file, uint32_t line);
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F1xx_HAL_CONF_H */
|
||||||
|
|
||||||
@ -0,0 +1,68 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f1xx_it.h
|
||||||
|
* @brief This file contains the headers of the interrupt handlers.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F1xx_IT_H
|
||||||
|
#define __STM32F1xx_IT_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN ET */
|
||||||
|
|
||||||
|
/* USER CODE END ET */
|
||||||
|
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EC */
|
||||||
|
|
||||||
|
/* USER CODE END EC */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EM */
|
||||||
|
|
||||||
|
/* USER CODE END EM */
|
||||||
|
|
||||||
|
/* Exported functions prototypes ---------------------------------------------*/
|
||||||
|
void NMI_Handler(void);
|
||||||
|
void HardFault_Handler(void);
|
||||||
|
void MemManage_Handler(void);
|
||||||
|
void BusFault_Handler(void);
|
||||||
|
void UsageFault_Handler(void);
|
||||||
|
void DebugMon_Handler(void);
|
||||||
|
void DMA1_Channel4_IRQHandler(void);
|
||||||
|
void DMA1_Channel5_IRQHandler(void);
|
||||||
|
void TIM3_IRQHandler(void);
|
||||||
|
void TIM4_IRQHandler(void);
|
||||||
|
void USART1_IRQHandler(void);
|
||||||
|
/* USER CODE BEGIN EFP */
|
||||||
|
|
||||||
|
/* USER CODE END EFP */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F1xx_IT_H */
|
||||||
57
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/tim.h
Normal file
57
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/tim.h
Normal file
@ -0,0 +1,57 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file tim.h
|
||||||
|
* @brief This file contains all the function prototypes for
|
||||||
|
* the tim.c file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __TIM_H__
|
||||||
|
#define __TIM_H__
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
extern TIM_HandleTypeDef htim2;
|
||||||
|
|
||||||
|
extern TIM_HandleTypeDef htim3;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_TIM2_Init(void);
|
||||||
|
void MX_TIM3_Init(void);
|
||||||
|
|
||||||
|
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
|
||||||
|
/* USER CODE END Prototypes */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __TIM_H__ */
|
||||||
|
|
||||||
64
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/usart.h
Normal file
64
1_iteration/firmware/ECG_D_0001_31102024/Core/Inc/usart.h
Normal file
@ -0,0 +1,64 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file usart.h
|
||||||
|
* @brief This file contains all the function prototypes for
|
||||||
|
* the usart.c file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __USART_H__
|
||||||
|
#define __USART_H__
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
#include <stdio.h>
|
||||||
|
#include <stdarg.h>
|
||||||
|
#include <string.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
|
#include "control.h"
|
||||||
|
#include "icd.h"
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
extern UART_HandleTypeDef huart1;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
#define TX_PLOAD_WIDTH 32
|
||||||
|
#define MESH_PLOAD_WIDTH 28
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_USART1_UART_Init(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
void print_usart(const char *pFormat, ...);
|
||||||
|
void ble_init(bool on_off);
|
||||||
|
void ble_control(ctrl_struct* control);
|
||||||
|
void ble_deinit(void);
|
||||||
|
void ble_HEX(ctrl_struct* control, adc_struct* adc,bool send);
|
||||||
|
void ble_HEX_new(ctrl_struct* control, icd_str * icd_str, adc_struct* adc,bool send);
|
||||||
|
/* USER CODE END Prototypes */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __USART_H__ */
|
||||||
|
|
||||||
@ -0,0 +1,20 @@
|
|||||||
|
/*
|
||||||
|
* usart_ring.h
|
||||||
|
*
|
||||||
|
* Created on: 19 авг. 2019 г.
|
||||||
|
* Author: dima
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef USART_RING_H_
|
||||||
|
#define USART_RING_H_
|
||||||
|
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
#define MYUART huart1 // задефайнить USART
|
||||||
|
#define UART_RX_BUFFER_SIZE 128 // указать размер приёмного буфера
|
||||||
|
|
||||||
|
uint16_t uart_available(void);
|
||||||
|
uint8_t uart_read(void);
|
||||||
|
void clear_uart_buff();
|
||||||
|
|
||||||
|
#endif /* USART_RING_H_ */
|
||||||
162
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/adc.c
Normal file
162
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/adc.c
Normal file
@ -0,0 +1,162 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file adc.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of the ADC instances.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "adc.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
adc_struct adc_str;//структура ацп
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
ADC_HandleTypeDef hadc1;
|
||||||
|
|
||||||
|
/* ADC1 init function */
|
||||||
|
void MX_ADC1_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN ADC1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END ADC1_Init 0 */
|
||||||
|
|
||||||
|
ADC_ChannelConfTypeDef sConfig = {0};
|
||||||
|
|
||||||
|
/* USER CODE BEGIN ADC1_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END ADC1_Init 1 */
|
||||||
|
|
||||||
|
/** Common config
|
||||||
|
*/
|
||||||
|
hadc1.Instance = ADC1;
|
||||||
|
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
|
||||||
|
hadc1.Init.ContinuousConvMode = DISABLE;
|
||||||
|
hadc1.Init.DiscontinuousConvMode = ENABLE;
|
||||||
|
hadc1.Init.NbrOfDiscConversion = 1;
|
||||||
|
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
||||||
|
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
|
||||||
|
hadc1.Init.NbrOfConversion = 3;
|
||||||
|
if (HAL_ADC_Init(&hadc1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/** Configure Regular Channel
|
||||||
|
*/
|
||||||
|
sConfig.Channel = ADC_CHANNEL_4;
|
||||||
|
sConfig.Rank = ADC_REGULAR_RANK_1;
|
||||||
|
sConfig.SamplingTime = ADC_SAMPLETIME_41CYCLES_5;
|
||||||
|
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/** Configure Regular Channel
|
||||||
|
*/
|
||||||
|
sConfig.Channel = ADC_CHANNEL_5;
|
||||||
|
sConfig.Rank = ADC_REGULAR_RANK_2;
|
||||||
|
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/** Configure Regular Channel
|
||||||
|
*/
|
||||||
|
sConfig.Channel = ADC_CHANNEL_6;
|
||||||
|
sConfig.Rank = ADC_REGULAR_RANK_3;
|
||||||
|
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN ADC1_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END ADC1_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
if(adcHandle->Instance==ADC1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN ADC1_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END ADC1_MspInit 0 */
|
||||||
|
/* ADC1 clock enable */
|
||||||
|
__HAL_RCC_ADC1_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
/**ADC1 GPIO Configuration
|
||||||
|
PA4 ------> ADC1_IN4
|
||||||
|
PA5 ------> ADC1_IN5
|
||||||
|
PA6 ------> ADC1_IN6
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN ADC1_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END ADC1_MspInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
if(adcHandle->Instance==ADC1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN ADC1_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END ADC1_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_ADC1_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**ADC1 GPIO Configuration
|
||||||
|
PA4 ------> ADC1_IN4
|
||||||
|
PA5 ------> ADC1_IN5
|
||||||
|
PA6 ------> ADC1_IN6
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END ADC1_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
void adc_read(adc_struct* adc)
|
||||||
|
{
|
||||||
|
|
||||||
|
adc->error = HAL_ADC_Start(&hadc1);
|
||||||
|
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
|
||||||
|
adc->ecg_1_raw = HAL_ADC_GetValue(&hadc1);//Небольшой псевдо фильтр цифровой K - 0.1
|
||||||
|
|
||||||
|
adc->error = HAL_ADC_Start(&hadc1);
|
||||||
|
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
|
||||||
|
adc->ecg_2_raw = HAL_ADC_GetValue(&hadc1);
|
||||||
|
|
||||||
|
adc->error = HAL_ADC_Start(&hadc1);
|
||||||
|
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
|
||||||
|
adc->ecg_3_raw = HAL_ADC_GetValue(&hadc1);
|
||||||
|
|
||||||
|
adc->error = HAL_ADC_Stop(&hadc1);
|
||||||
|
adc->drdy_trigger = true;
|
||||||
|
}
|
||||||
|
/* USER CODE END 1 */
|
||||||
257
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/control.c
Normal file
257
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/control.c
Normal file
@ -0,0 +1,257 @@
|
|||||||
|
#include "control.h"
|
||||||
|
|
||||||
|
|
||||||
|
//#include <stdio.h>
|
||||||
|
//#include <stdarg.h>
|
||||||
|
//#include <string.h>
|
||||||
|
ctrl_struct Control; //FLASH (rx)
|
||||||
|
|
||||||
|
void control_init(void)
|
||||||
|
{
|
||||||
|
Control.dev_type = DEV_TYPE;
|
||||||
|
Control.ble_mode_set = ble_raw;
|
||||||
|
Control.ble_mode_now = ble_off;
|
||||||
|
Control.serial_number = BASE_SERIAL_NUM;
|
||||||
|
Control.password = BASE_PASSWORD;
|
||||||
|
Control.mesh_netid = BASE_MESH_ID;
|
||||||
|
Control.mesh_adr = BASE_MESH_ADR;
|
||||||
|
Control.master_adr = BASE_MASTER_ADR;
|
||||||
|
Control.ble_ask = false;
|
||||||
|
}
|
||||||
|
|
||||||
|
void control_init_var(ctrl_struct * control)
|
||||||
|
{
|
||||||
|
control->dev_type = DEV_TYPE;
|
||||||
|
control->ble_mode_set = ble_off;
|
||||||
|
control->ble_mode_set = ble_off;
|
||||||
|
control->serial_number = BASE_SERIAL_NUM;
|
||||||
|
control->password = BASE_PASSWORD;
|
||||||
|
control->mesh_netid = BASE_MESH_ID;
|
||||||
|
control->mesh_adr = BASE_MESH_ADR;
|
||||||
|
control->master_adr = BASE_MASTER_ADR;
|
||||||
|
control->ble_ask = false;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void lets_sleep()
|
||||||
|
{
|
||||||
|
// //тразисторное отключение
|
||||||
|
// HAL_GPIO_WritePin(AFE_PWR_PORT, AFE_PWR_PIN, SET);
|
||||||
|
// HAL_GPIO_WritePin(SD_PWR_GPIO_Port, SD_PWR_Pin, SET);
|
||||||
|
// //Дисплей отключение
|
||||||
|
// GC9A01A_DeInit();
|
||||||
|
// GC9A01A_SetBL(0);
|
||||||
|
// HAL_GPIO_WritePin(DISP_PWR_GPIO_Port, DISP_PWR_Pin, RESET);
|
||||||
|
// //отключенеи простой переферии
|
||||||
|
// HAL_GPIO_WritePin(ADC_PWR_GPIO_Port, ADC_PWR_Pin, RESET);
|
||||||
|
// ble_deinit();
|
||||||
|
// I2c_off();//деинициализировали I2C
|
||||||
|
// HAL_GPIO_WritePin(I2C1_PWR_GPIO_Port, I2C1_PWR_Pin, RESET);//выключили I2C1
|
||||||
|
// HAL_GPIO_WritePin(I2C2_PWR_GPIO_Port, I2C2_PWR_Pin, RESET);//выключили I2C2
|
||||||
|
// HAL_GPIO_WritePin(POT_PWR_GPIO_Port, POT_PWR_Pin, RESET);//без этого работает фиг знает почему
|
||||||
|
//
|
||||||
|
// /*GC9A01A_DeInit();
|
||||||
|
// HAL_GPIO_WritePin(DISP_PWR_GPIO_Port, DISP_PWR_Pin, RESET);
|
||||||
|
// GC9A01A_SetBL(0);*/
|
||||||
|
//
|
||||||
|
// HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN1);
|
||||||
|
// HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN2);
|
||||||
|
// //Сейчас второй кнопки нет!!
|
||||||
|
// //HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN2);//если вторая кнопка тоже подключена PC0
|
||||||
|
// __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU);
|
||||||
|
// HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN1);
|
||||||
|
// HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN2);//если вторая кнопка тоже подключена PC0
|
||||||
|
// HAL_PWR_EnterSTANDBYMode();
|
||||||
|
}
|
||||||
|
|
||||||
|
////сюда нужно добавить проверку читаемых данных ,чтобы не читать пустой режим
|
||||||
|
//void FL_read_str(ctrl_struct * control)
|
||||||
|
//{
|
||||||
|
// uint8_t data[sizeof(ctrl_struct)] = {0};
|
||||||
|
// ctrl_struct buf_str;//структура для проверки данных
|
||||||
|
// for(int i = 0; i < sizeof(ctrl_struct); i++)
|
||||||
|
// {
|
||||||
|
// data[i] = FL_read_byte(MEM_ADR+i);
|
||||||
|
// }
|
||||||
|
// //memcpy(control,data,sizeof(ctrl_struct));
|
||||||
|
// memcpy(&buf_str,data,sizeof(ctrl_struct));
|
||||||
|
// //может сделать проверку валидности данных
|
||||||
|
// update_str(&buf_str,control);
|
||||||
|
//}
|
||||||
|
//
|
||||||
|
////Функция обновления структуры
|
||||||
|
//int update_str(ctrl_struct * buf_str,ctrl_struct * main_str)
|
||||||
|
//{
|
||||||
|
// int correct_val = 0;
|
||||||
|
// uint8_t counter = 0;
|
||||||
|
// //проверим осноные настройки
|
||||||
|
// if(buf_str->serial_number >= MIN_SERIAL_NUM && buf_str->serial_number <= MAX_SERIAL_NUM)
|
||||||
|
// {
|
||||||
|
// main_str->serial_number = buf_str->serial_number;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->password >= MIN_PASS && buf_str->password <= MAX_PASS)
|
||||||
|
// {
|
||||||
|
// main_str->password = buf_str->password;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->mesh_netid >= MIN_MESH_ID && buf_str->mesh_netid <= MAX_MESH_ID)
|
||||||
|
// {
|
||||||
|
// main_str->mesh_netid = buf_str->mesh_netid;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->mesh_adr >= MIN_SERIAL_NUM && buf_str->mesh_adr <= MAX_SERIAL_NUM)
|
||||||
|
// {
|
||||||
|
// main_str->mesh_adr = buf_str->mesh_adr;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->master_adr >= MIN_MESH_MASTER_ID && buf_str->master_adr <= MAX_MESH_MASTER_ID)
|
||||||
|
// {
|
||||||
|
// main_str->master_adr = buf_str->master_adr;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// //настройки ФПГ
|
||||||
|
// if(buf_str->ppg_hr_high >= HR_HIGH_MIN && buf_str->ppg_hr_high <= HR_HIGH_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->ppg_hr_high = buf_str->ppg_hr_high;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->ppg_hr_low >= HR_LOW_MIN && buf_str->ppg_hr_low <= HR_LOW_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->ppg_hr_low = buf_str->ppg_hr_low;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->ppg_hr_wait >= HR_WAIT_MIN && buf_str->ppg_hr_wait <= HR_WAIT_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->ppg_hr_wait = buf_str->ppg_hr_wait;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// //настройки акселерометра
|
||||||
|
// if(buf_str->mpu_low_g_tres >= LOW_G_TRES_MIN && buf_str->mpu_low_g_tres <= LOW_G_TRES_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->mpu_low_g_tres = buf_str->mpu_low_g_tres;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->mpu_low_g_time >= LOW_G_TIME_MIN && buf_str->mpu_low_g_time <= LOW_G_TIME_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->mpu_low_g_time = buf_str->mpu_low_g_time;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->mpu_low_g_Alarm_Tim >= LOW_G_ALARM_TIME_MIN && buf_str->mpu_low_g_Alarm_Tim <= LOW_G_ALARM_TIME_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->mpu_low_g_Alarm_Tim = buf_str->mpu_low_g_Alarm_Tim;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->mpu_high_g_tres >= HIGH_G_TRES_MIN && buf_str->mpu_high_g_tres <= HIGH_G_TRES_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->mpu_high_g_tres = buf_str->mpu_high_g_tres;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->mpu_high_g_Alarm_Tim >= HIGH_G_ALARM_TIME_MIN && buf_str->mpu_high_g_Alarm_Tim <= HIGH_G_ALARM_TIME_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->mpu_high_g_Alarm_Tim = buf_str->mpu_high_g_Alarm_Tim;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// //настройки термометра
|
||||||
|
// if(buf_str->temp_low_tres >= TEMP_LOW_MIN && buf_str->temp_low_tres <= TEMP_LOW_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->temp_low_tres = buf_str->temp_low_tres;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->temp_high_tres >= TEMP_HIGH_MIN && buf_str->temp_high_tres <= TEMP_HIGH_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->temp_high_tres = buf_str->temp_high_tres;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// counter++;
|
||||||
|
//
|
||||||
|
// if(buf_str->temp_alarm_time >= TEMP_WAIT_MIN && buf_str->temp_alarm_time <= TEMP_WAIT_MAX)
|
||||||
|
// {
|
||||||
|
// main_str->temp_alarm_time = buf_str->temp_alarm_time;
|
||||||
|
// correct_val|=(1<<counter);//выставили бит что значение корректно
|
||||||
|
// }
|
||||||
|
// return correct_val;
|
||||||
|
//}
|
||||||
|
//
|
||||||
|
//int scan_str_USB(char* mess)
|
||||||
|
//{
|
||||||
|
// int result = -1;
|
||||||
|
// ctrl_struct trash_buf = {};//структура для проверки данных
|
||||||
|
// //проверка корректности строки
|
||||||
|
// //SET_STR:0x4001,0x13,0x1,0x1,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
// if(sscanf(mess, "SET_STR %x %x %x %x %d %d %d %d %d %d %d %d %d %d %d %d\n",
|
||||||
|
// //if(sscanf(mess, "SET_STR:%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d",
|
||||||
|
// //основные параметры
|
||||||
|
// &trash_buf.serial_number,
|
||||||
|
// &trash_buf.mesh_netid,
|
||||||
|
// &trash_buf.master_adr,
|
||||||
|
// &trash_buf.mesh_adr,
|
||||||
|
// &trash_buf.password,
|
||||||
|
// //пороги ФПГ
|
||||||
|
// &trash_buf.ppg_hr_high,
|
||||||
|
// &trash_buf.ppg_hr_low,
|
||||||
|
// &trash_buf.ppg_hr_wait,
|
||||||
|
// //акселерометр
|
||||||
|
// &trash_buf.mpu_low_g_tres,
|
||||||
|
// &trash_buf.mpu_low_g_time,
|
||||||
|
// &trash_buf.mpu_low_g_Alarm_Tim,
|
||||||
|
// &trash_buf.mpu_high_g_tres,
|
||||||
|
// &trash_buf.mpu_high_g_Alarm_Tim,
|
||||||
|
// //термометр
|
||||||
|
// &trash_buf.temp_low_tres,
|
||||||
|
// &trash_buf.temp_high_tres,
|
||||||
|
// &trash_buf.temp_alarm_time) == 16)
|
||||||
|
// {
|
||||||
|
// //проверка корректности значений в строке
|
||||||
|
// result = update_str(&trash_buf,&Control);
|
||||||
|
// }
|
||||||
|
// return result;
|
||||||
|
//}
|
||||||
|
//
|
||||||
|
//
|
||||||
|
//void FL_write_str(ctrl_struct * control)
|
||||||
|
//{
|
||||||
|
// HAL_FLASH_Unlock();
|
||||||
|
// uint8_t data[sizeof(ctrl_struct)] = {0};
|
||||||
|
// memcpy(data,control,sizeof(ctrl_struct));
|
||||||
|
//
|
||||||
|
// FLASH_Erase_Sector(MEM_FLASH_SECTOR, VOLTAGE_RANGE_3);
|
||||||
|
// for(int i = 0; i < sizeof(ctrl_struct); i++)
|
||||||
|
// {
|
||||||
|
// HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, MEM_ADR+i, data[i]);
|
||||||
|
// }
|
||||||
|
// HAL_FLASH_Lock();
|
||||||
|
//}
|
||||||
|
//
|
||||||
|
//uint8_t FL_read_byte(uint32_t addr)
|
||||||
|
//{
|
||||||
|
// return *(volatile uint8_t *)addr;
|
||||||
|
//}
|
||||||
58
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/dma.c
Normal file
58
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/dma.c
Normal file
@ -0,0 +1,58 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file dma.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of all the requested memory to memory DMA transfers.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "dma.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
/* Configure DMA */
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Enable DMA controller clock
|
||||||
|
*/
|
||||||
|
void MX_DMA_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* DMA controller clock enable */
|
||||||
|
__HAL_RCC_DMA1_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* DMA interrupt init */
|
||||||
|
/* DMA1_Channel4_IRQn interrupt configuration */
|
||||||
|
HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
|
||||||
|
/* DMA1_Channel5_IRQn interrupt configuration */
|
||||||
|
HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 2 */
|
||||||
|
|
||||||
|
/* USER CODE END 2 */
|
||||||
|
|
||||||
177
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/filter.c
Normal file
177
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/filter.c
Normal file
@ -0,0 +1,177 @@
|
|||||||
|
#include "filter.h"
|
||||||
|
|
||||||
|
#define NCoef_50hz_2or 4
|
||||||
|
|
||||||
|
float iir_50hz_2or(float NewSample)
|
||||||
|
{
|
||||||
|
float ACoef[NCoef_50hz_2or+1] = {
|
||||||
|
0.88238733633963495000,
|
||||||
|
0.00000000000000000000,
|
||||||
|
1.76477467267926990000,
|
||||||
|
0.00000000000000000000,
|
||||||
|
0.88238733633963495000
|
||||||
|
};
|
||||||
|
|
||||||
|
float BCoef[NCoef_50hz_2or+1] = {
|
||||||
|
1.00000000000000000000,
|
||||||
|
0.00000000002797958790,
|
||||||
|
1.73472576874776110000,
|
||||||
|
-0.00000000003972608856,
|
||||||
|
0.76600660085864003000
|
||||||
|
};
|
||||||
|
|
||||||
|
static float y[NCoef_50hz_2or+1]; //output samples
|
||||||
|
static float x[NCoef_50hz_2or+1]; //input samples
|
||||||
|
int n;
|
||||||
|
|
||||||
|
//shift the old samples
|
||||||
|
for(n=NCoef_50hz_2or; n>0; n--) {
|
||||||
|
x[n] = x[n-1];
|
||||||
|
y[n] = y[n-1];
|
||||||
|
}
|
||||||
|
|
||||||
|
//Calculate the new output
|
||||||
|
x[0] = NewSample;
|
||||||
|
y[0] = ACoef[0] * x[0];
|
||||||
|
for(n=1; n<=NCoef_50hz_2or; n++)
|
||||||
|
y[0] += ACoef[n] * x[n] - BCoef[n] * y[n];
|
||||||
|
|
||||||
|
return y[0];
|
||||||
|
}
|
||||||
|
|
||||||
|
#define NCoef_50hz_1or 2
|
||||||
|
float iir_50hz_1or(float NewSample) {
|
||||||
|
float ACoef[NCoef_50hz_1or+1] = {
|
||||||
|
0.90906873056553772000,
|
||||||
|
0.00000000000000000000,
|
||||||
|
0.90906873056553772000
|
||||||
|
};
|
||||||
|
|
||||||
|
float BCoef[NCoef_50hz_1or+1] = {
|
||||||
|
1.00000000000000000000,
|
||||||
|
-0.00000000003423416752,
|
||||||
|
0.82727194590455844000
|
||||||
|
};
|
||||||
|
|
||||||
|
static float y[NCoef_50hz_1or+1]; //output samples
|
||||||
|
static float x[NCoef_50hz_1or+1]; //input samples
|
||||||
|
int n;
|
||||||
|
|
||||||
|
//shift the old samples
|
||||||
|
for(n=NCoef_50hz_1or; n>0; n--) {
|
||||||
|
x[n] = x[n-1];
|
||||||
|
y[n] = y[n-1];
|
||||||
|
}
|
||||||
|
|
||||||
|
//Calculate the new output
|
||||||
|
x[0] = NewSample;
|
||||||
|
y[0] = ACoef[0] * x[0];
|
||||||
|
for(n=1; n<=NCoef_50hz_1or; n++)
|
||||||
|
y[0] += ACoef[n] * x[n] - BCoef[n] * y[n];
|
||||||
|
|
||||||
|
return y[0];
|
||||||
|
}
|
||||||
|
|
||||||
|
#define NCoefhp 1
|
||||||
|
float iir_hp(float NewSample) {
|
||||||
|
float ACoef[NCoefhp+1] = {
|
||||||
|
0.98452866335087641000,
|
||||||
|
-0.98452866335087641000
|
||||||
|
};
|
||||||
|
|
||||||
|
float BCoef[NCoefhp+1] = {
|
||||||
|
1.00000000000000000000,
|
||||||
|
-0.96906741719524436000
|
||||||
|
};
|
||||||
|
|
||||||
|
static float y[NCoefhp+1]; //output samples
|
||||||
|
static float x[NCoefhp+1]; //input samples
|
||||||
|
int n;
|
||||||
|
|
||||||
|
//shift the old samples
|
||||||
|
for(n=NCoefhp; n>0; n--) {
|
||||||
|
x[n] = x[n-1];
|
||||||
|
y[n] = y[n-1];
|
||||||
|
}
|
||||||
|
|
||||||
|
//Calculate the new output
|
||||||
|
x[0] = NewSample;
|
||||||
|
y[0] = ACoef[0] * x[0];
|
||||||
|
for(n=1; n<=NCoefhp; n++)
|
||||||
|
y[0] += ACoef[n] * x[n] - BCoef[n] * y[n];
|
||||||
|
|
||||||
|
return y[0];
|
||||||
|
}
|
||||||
|
#define NCoef_4060 4
|
||||||
|
float iir_4060(float NewSample) {
|
||||||
|
float ACoef[NCoef_4060+1] = {
|
||||||
|
0.63878443277987573000,
|
||||||
|
0.00000000000000000000,
|
||||||
|
1.27756886555975150000,
|
||||||
|
0.00000000000000000000,
|
||||||
|
0.63878443277987573000
|
||||||
|
};
|
||||||
|
|
||||||
|
float BCoef[NCoef_4060+1] = {
|
||||||
|
1.00000000000000000000,
|
||||||
|
0.00000000001085573304,
|
||||||
|
1.14298050252887370000,
|
||||||
|
-0.00000000003731445864,
|
||||||
|
0.41280159805878519000
|
||||||
|
};
|
||||||
|
|
||||||
|
static float y[NCoef_4060+1]; //output samples
|
||||||
|
static float x[NCoef_4060+1]; //input samples
|
||||||
|
int n;
|
||||||
|
|
||||||
|
//shift the old samples
|
||||||
|
for(n=NCoef_4060; n>0; n--) {
|
||||||
|
x[n] = x[n-1];
|
||||||
|
y[n] = y[n-1];
|
||||||
|
}
|
||||||
|
|
||||||
|
//Calculate the new output
|
||||||
|
x[0] = NewSample;
|
||||||
|
y[0] = ACoef[0] * x[0];
|
||||||
|
for(n=1; n<=NCoef_4060; n++)
|
||||||
|
y[0] += ACoef[n] * x[n] - BCoef[n] * y[n];
|
||||||
|
|
||||||
|
return y[0];
|
||||||
|
}
|
||||||
|
|
||||||
|
#define NCoef_lp 4
|
||||||
|
float iir_lp30(float NewSample) {
|
||||||
|
float ACoef[NCoef_lp+1] = {
|
||||||
|
0.01856343837888402300,
|
||||||
|
0.07425375351553609200,
|
||||||
|
0.11138063027330414000,
|
||||||
|
0.07425375351553609200,
|
||||||
|
0.01856343837888402300
|
||||||
|
};
|
||||||
|
|
||||||
|
float BCoef[NCoef_lp+1] = {
|
||||||
|
1.00000000000000000000,
|
||||||
|
-1.57039885122817170000,
|
||||||
|
1.27561332498327910000,
|
||||||
|
-0.48440336833508529000,
|
||||||
|
0.07619706461033234900
|
||||||
|
};
|
||||||
|
|
||||||
|
static float y[NCoef_lp+1]; //output samples
|
||||||
|
static float x[NCoef_lp+1]; //input samples
|
||||||
|
int n;
|
||||||
|
|
||||||
|
//shift the old samples
|
||||||
|
for(n=NCoef_lp; n>0; n--) {
|
||||||
|
x[n] = x[n-1];
|
||||||
|
y[n] = y[n-1];
|
||||||
|
}
|
||||||
|
|
||||||
|
//Calculate the new output
|
||||||
|
x[0] = NewSample;
|
||||||
|
y[0] = ACoef[0] * x[0];
|
||||||
|
for(n=1; n<=NCoef_lp; n++)
|
||||||
|
y[0] += ACoef[n] * x[n] - BCoef[n] * y[n];
|
||||||
|
|
||||||
|
return y[0];
|
||||||
|
}
|
||||||
258
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/freertos.c
Normal file
258
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/freertos.c
Normal file
@ -0,0 +1,258 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* File Name : freertos.c
|
||||||
|
* Description : Code for freertos applications
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "FreeRTOS.h"
|
||||||
|
#include "task.h"
|
||||||
|
#include "main.h"
|
||||||
|
#include "cmsis_os.h"
|
||||||
|
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
#include "adc.h"
|
||||||
|
#include "usart.h"
|
||||||
|
#include "control.h"
|
||||||
|
#include "icd.h"
|
||||||
|
#include "parse.h"
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PTD */
|
||||||
|
bool TEST_I = false;
|
||||||
|
//bool TEST_I = true;
|
||||||
|
/* USER CODE END PTD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PD */
|
||||||
|
extern adc_struct adc_str;//структура ацп
|
||||||
|
extern ctrl_struct Control; //FLASH (rx)
|
||||||
|
extern icd_str ICD; //
|
||||||
|
/* USER CODE END PD */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PM */
|
||||||
|
|
||||||
|
/* USER CODE END PM */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Variables */
|
||||||
|
|
||||||
|
/* USER CODE END Variables */
|
||||||
|
osThreadId defaultTaskHandle;
|
||||||
|
uint32_t defaultTaskBuffer[ 300 ];
|
||||||
|
osStaticThreadDef_t defaultTaskControlBlock;
|
||||||
|
osThreadId OprosTaskHandle;
|
||||||
|
uint32_t OprosTaskBuffer[ 300 ];
|
||||||
|
osStaticThreadDef_t OprosTaskControlBlock;
|
||||||
|
osThreadId ControlTaskHandle;
|
||||||
|
uint32_t ControlTaskBuffer[ 300 ];
|
||||||
|
osStaticThreadDef_t ControlTaskControlBlock;
|
||||||
|
osThreadId LowSpeedTaskHandle;
|
||||||
|
uint32_t LowSpeedTaskBuffer[ 300 ];
|
||||||
|
osStaticThreadDef_t LowSpeedTaskControlBlock;
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN FunctionPrototypes */
|
||||||
|
|
||||||
|
/* USER CODE END FunctionPrototypes */
|
||||||
|
|
||||||
|
void StartDefaultTask(void const * argument);
|
||||||
|
void StartOprosTask(void const * argument);
|
||||||
|
void StartControlTask(void const * argument);
|
||||||
|
void StartLowSpeedTask(void const * argument);
|
||||||
|
|
||||||
|
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
|
||||||
|
|
||||||
|
/* GetIdleTaskMemory prototype (linked to static allocation support) */
|
||||||
|
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
|
||||||
|
|
||||||
|
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
|
||||||
|
static StaticTask_t xIdleTaskTCBBuffer;
|
||||||
|
static StackType_t xIdleStack[configMINIMAL_STACK_SIZE];
|
||||||
|
|
||||||
|
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
|
||||||
|
{
|
||||||
|
*ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
|
||||||
|
*ppxIdleTaskStackBuffer = &xIdleStack[0];
|
||||||
|
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
|
||||||
|
/* place for user code */
|
||||||
|
}
|
||||||
|
/* USER CODE END GET_IDLE_TASK_MEMORY */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief FreeRTOS initialization
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void MX_FREERTOS_Init(void) {
|
||||||
|
/* USER CODE BEGIN Init */
|
||||||
|
init_icd(&ICD);
|
||||||
|
//плавный разряд включен
|
||||||
|
HAL_GPIO_WritePin(HV_DIS_GPIO_Port, HV_DIS_Pin, GPIO_PIN_RESET);
|
||||||
|
/* USER CODE END Init */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN RTOS_MUTEX */
|
||||||
|
/* add mutexes, ... */
|
||||||
|
/* USER CODE END RTOS_MUTEX */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN RTOS_SEMAPHORES */
|
||||||
|
/* add semaphores, ... */
|
||||||
|
/* USER CODE END RTOS_SEMAPHORES */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN RTOS_TIMERS */
|
||||||
|
/* start timers, add new ones, ... */
|
||||||
|
/* USER CODE END RTOS_TIMERS */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN RTOS_QUEUES */
|
||||||
|
/* add queues, ... */
|
||||||
|
/* USER CODE END RTOS_QUEUES */
|
||||||
|
|
||||||
|
/* Create the thread(s) */
|
||||||
|
/* definition and creation of defaultTask */
|
||||||
|
osThreadStaticDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 300, defaultTaskBuffer, &defaultTaskControlBlock);
|
||||||
|
defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
|
||||||
|
|
||||||
|
/* definition and creation of OprosTask */
|
||||||
|
osThreadStaticDef(OprosTask, StartOprosTask, osPriorityIdle, 0, 300, OprosTaskBuffer, &OprosTaskControlBlock);
|
||||||
|
OprosTaskHandle = osThreadCreate(osThread(OprosTask), NULL);
|
||||||
|
|
||||||
|
/* definition and creation of ControlTask */
|
||||||
|
osThreadStaticDef(ControlTask, StartControlTask, osPriorityIdle, 0, 300, ControlTaskBuffer, &ControlTaskControlBlock);
|
||||||
|
ControlTaskHandle = osThreadCreate(osThread(ControlTask), NULL);
|
||||||
|
|
||||||
|
/* definition and creation of LowSpeedTask */
|
||||||
|
osThreadStaticDef(LowSpeedTask, StartLowSpeedTask, osPriorityIdle, 0, 300, LowSpeedTaskBuffer, &LowSpeedTaskControlBlock);
|
||||||
|
LowSpeedTaskHandle = osThreadCreate(osThread(LowSpeedTask), NULL);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN RTOS_THREADS */
|
||||||
|
/* add threads, ... */
|
||||||
|
/* USER CODE END RTOS_THREADS */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Header_StartDefaultTask */
|
||||||
|
/**
|
||||||
|
* @brief Function implementing the defaultTask thread.
|
||||||
|
* @param argument: Not used
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header_StartDefaultTask */
|
||||||
|
void StartDefaultTask(void const * argument)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN StartDefaultTask */
|
||||||
|
/* Infinite loop */
|
||||||
|
for(;;)
|
||||||
|
{
|
||||||
|
osDelay(100);
|
||||||
|
}
|
||||||
|
/* USER CODE END StartDefaultTask */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Header_StartOprosTask */
|
||||||
|
/**
|
||||||
|
* @brief Function implementing the OprosTask thread.
|
||||||
|
* @param argument: Not used
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header_StartOprosTask */
|
||||||
|
void StartOprosTask(void const * argument)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN StartOprosTask */
|
||||||
|
/* Infinite loop */
|
||||||
|
for (;;)
|
||||||
|
{
|
||||||
|
if(adc_str.drdy_trigger)
|
||||||
|
{
|
||||||
|
adc_str.drdy_trigger = false; //сбросили флаг
|
||||||
|
if (ICD.active_ch == 1)
|
||||||
|
get_data(&ICD, adc_str.ecg_1_raw);
|
||||||
|
if (ICD.active_ch == 2)
|
||||||
|
get_data(&ICD, adc_str.ecg_2_raw);
|
||||||
|
if (ICD.active_ch == 3)
|
||||||
|
get_data(&ICD, adc_str.ecg_3_raw);
|
||||||
|
//обычный алгоритм поиска
|
||||||
|
search_alg(&ICD);
|
||||||
|
ble_HEX_new(&Control, &ICD, &adc_str, true);
|
||||||
|
}
|
||||||
|
osDelay(1);
|
||||||
|
}
|
||||||
|
/* USER CODE END StartOprosTask */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Header_StartControlTask */
|
||||||
|
/**
|
||||||
|
* @brief Function implementing the ControlTask thread.
|
||||||
|
* @param argument: Not used
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
// тут терапия располагается
|
||||||
|
/* USER CODE END Header_StartControlTask */
|
||||||
|
void StartControlTask(void const * argument)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN StartControlTask */
|
||||||
|
/* Infinite loop */
|
||||||
|
for (;;)
|
||||||
|
{
|
||||||
|
terapy_algorithm(&ICD);
|
||||||
|
osDelay(100);
|
||||||
|
}
|
||||||
|
/* USER CODE END StartControlTask */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Header_StartLowSpeedTask */
|
||||||
|
/**
|
||||||
|
* @brief Function implementing the LowSpeedTask thread.
|
||||||
|
* @param argument: Not used
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header_StartLowSpeedTask */
|
||||||
|
void StartLowSpeedTask(void const * argument)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN StartLowSpeedTask */
|
||||||
|
static uint8_t buff[16];
|
||||||
|
|
||||||
|
HAL_StatusTypeDef status;
|
||||||
|
/* Infinite loop */
|
||||||
|
for (;;)
|
||||||
|
{
|
||||||
|
status = HAL_UART_Receive_DMA(&huart1, (uint8_t*)buff, 7);
|
||||||
|
osDelay(10);
|
||||||
|
if(status == HAL_OK)
|
||||||
|
{
|
||||||
|
parse_command(buff, &ICD);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/* USER CODE END StartLowSpeedTask */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Private application code --------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Application */
|
||||||
|
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||||
|
{
|
||||||
|
if (huart->Instance == USART1)
|
||||||
|
{
|
||||||
|
// USART1 завершил прием данных
|
||||||
|
// 1;
|
||||||
|
|
||||||
|
// тут должет быть парсинг сообщений и стирание старых сообщений
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/* USER CODE END Application */
|
||||||
|
|
||||||
90
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/gpio.c
Normal file
90
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/gpio.c
Normal file
@ -0,0 +1,90 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file gpio.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of all used GPIO pins.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "gpio.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
/* Configure GPIO */
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
|
/** Configure pins as
|
||||||
|
* Analog
|
||||||
|
* Input
|
||||||
|
* Output
|
||||||
|
* EVENT_OUT
|
||||||
|
* EXTI
|
||||||
|
PA2 ------> USART2_TX
|
||||||
|
*/
|
||||||
|
void MX_GPIO_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
|
||||||
|
/* GPIO Ports Clock Enable */
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
|
||||||
|
/*Configure GPIO pin Output Level */
|
||||||
|
HAL_GPIO_WritePin(GPIOA, LED_Pin|BLE_PWR_Pin|BLE_PWRC_Pin|V9_5_EN_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
|
/*Configure GPIO pin Output Level */
|
||||||
|
HAL_GPIO_WritePin(GPIOB, HV_PWR_EN_Pin|HV_DIS_Pin|HV_SHOCK_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
|
/*Configure GPIO pin : PA2 */
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pins : PAPin PAPin PAPin */
|
||||||
|
GPIO_InitStruct.Pin = LED_Pin|BLE_PWR_Pin|V9_5_EN_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pin : PtPin */
|
||||||
|
GPIO_InitStruct.Pin = BLE_PWRC_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
HAL_GPIO_Init(BLE_PWRC_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pins : PBPin PBPin PBPin */
|
||||||
|
GPIO_InitStruct.Pin = HV_PWR_EN_Pin|HV_DIS_Pin|HV_SHOCK_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 2 */
|
||||||
|
|
||||||
|
/* USER CODE END 2 */
|
||||||
756
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/icd.c
Normal file
756
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/icd.c
Normal file
@ -0,0 +1,756 @@
|
|||||||
|
#include "icd.h"
|
||||||
|
#include "filter.h"
|
||||||
|
#include "parse.h"
|
||||||
|
#if MK_TYPE==F412
|
||||||
|
#include <math.h>
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
icd_str ICD;
|
||||||
|
extern adc_struct adc_str;//структура ацп
|
||||||
|
void init_icd(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
icd_str->work_set_mode = Monitor;
|
||||||
|
|
||||||
|
icd_str->search_set_mode = Mode_search_BASE; //режим
|
||||||
|
icd_str->search_now_mode = Mode_start_UP; //режим
|
||||||
|
|
||||||
|
icd_str->filter_on = true;//фильтр активен
|
||||||
|
icd_str->active_ch = 1;//используемый канал
|
||||||
|
icd_str->sd_card = false;//использование SD карты
|
||||||
|
icd_str->dc_cut = true;//вычитание постоянной составляющей
|
||||||
|
|
||||||
|
//минимальный и максимальный пороги с плав. точкой и инт в десятых миливольта
|
||||||
|
icd_str->min_tres = MIN_TRES;
|
||||||
|
icd_str->max_tres = MAX_TRES;
|
||||||
|
// время на весь qrs rjvgktrc
|
||||||
|
icd_str->max_time = (ALL_TIME_MS * DATA_RATE)/1000;
|
||||||
|
// время слепоты при включении
|
||||||
|
icd_str->start_up_time = (START_UP_TIME_MS * DATA_RATE)/1000;
|
||||||
|
// время поиска в базовом режиме с минимальным порогом
|
||||||
|
icd_str->base_time = (SEARCH_BASE_TIME_MS * DATA_RATE)/1000;
|
||||||
|
// Время в мс которое алгоритм ищет максимум
|
||||||
|
icd_str->max_search_time = (SEARCH_MAX_TIME_MS * DATA_RATE)/1000;
|
||||||
|
// Время в мс нахождения в режиме поиска квадратов
|
||||||
|
icd_str->square_time = (SQUARE_TIME_MS * DATA_RATE)/1000;
|
||||||
|
// Время в мс нахождения в режиме поиска треугольников
|
||||||
|
icd_str->triangle_time = (TRIANGLE_TIME_MS * DATA_RATE)/1000;
|
||||||
|
// время каждой ступени в режиме треугольников
|
||||||
|
icd_str->triangle_step_time = (TRIANGLE_STEP_TIME_MS * DATA_RATE)/1000;
|
||||||
|
// Время в мс которое длится режим стимуляции низким напряжением
|
||||||
|
icd_str->lv_mode_time = (LV_TIME_MS * DATA_RATE)/1000;
|
||||||
|
// это во моногом эрзац.
|
||||||
|
icd_str->lv_start_time = (LV_START_TIME_MS * DATA_RATE)/1000; //во сколько начали выдавать импульс
|
||||||
|
icd_str->lv_stop_time = (LV_STOP_TIME_MS* DATA_RATE)/1000; //во сколько закончили выдавать импульс
|
||||||
|
|
||||||
|
// коэффициент на который умножается сигнал при переход в режим квадратов
|
||||||
|
icd_str->square_coef = SQUARE_COEF;
|
||||||
|
// коэффициент на который умножается сигнал на каждой ступени в режиме треугольников
|
||||||
|
icd_str->triangle_coef = TRIANGLE_COEF;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
// тип последнего определённого события
|
||||||
|
icd_str->last_QRS = Vsense;
|
||||||
|
// время между последним и предпоследним событием
|
||||||
|
icd_str->last_period = 1000;
|
||||||
|
icd_str->counter = 0;
|
||||||
|
|
||||||
|
icd_str->last_RR_amp = MIN_TRES; // переменная в которой храним амплитуды начала QRS
|
||||||
|
icd_str->last_RR_poz = 0; //переменная в котором храним положение начала QRS
|
||||||
|
icd_str->last_RR_poz_rel = 0; //переменная в которой храним относительное положение начала QRS
|
||||||
|
|
||||||
|
// Счётчики нужны для алгоритма терапии Михаила
|
||||||
|
icd_str->Vs_cnt = 0; //счётчик собственных сокращений сердца
|
||||||
|
icd_str->Vn_cnt = 0; //счётчик собственных сокращений которые в шуме(не детектируется пока fixme)
|
||||||
|
icd_str->Vp_cnt = 0; //счётчик принудительных стимуляций сердца низким напряжением(низковольтная стимуляция)
|
||||||
|
|
||||||
|
icd_str->fibr_cnt = 0; //счётчик фибриляции при обнаружении короткого RR он растёт
|
||||||
|
icd_str->fibr_max_tres = TERAPY_TRES; //порог счётчика фибриляций при котором начинаем терапию
|
||||||
|
|
||||||
|
icd_str->LV_on = false; // реально стимулируем низковольтно
|
||||||
|
icd_str->HV_on = false; // реально стимулируем низковольтно
|
||||||
|
|
||||||
|
icd_str->ecg_rv_din_treshold = 0.0; //динамический порог
|
||||||
|
|
||||||
|
|
||||||
|
// тут уже корзины
|
||||||
|
//порог периода фибриляции если период меньше, чем это число это фибриляция
|
||||||
|
icd_str->fibr_tres = (FIBR_PERIOD * DATA_RATE)/1000;
|
||||||
|
//порог периода Тахикардии 2 если период меньше, чем это число это Тахикардия 2
|
||||||
|
icd_str->tachy_2_tres = (TACHY_2_PERIOD * DATA_RATE)/1000;
|
||||||
|
//порог периода Тахикардии 1 если период меньше, чем это число это Тахикардия 1
|
||||||
|
icd_str->tachy_1_tres = (TACHY_1_PERIOD * DATA_RATE)/1000;
|
||||||
|
|
||||||
|
icd_str->vs_cnt_last = 0;//сбрасываемый счётчик нормальных событий
|
||||||
|
icd_str->fibr_cnt = 0; //счётчик фибриляции при обнаружении короткого RR он растёт
|
||||||
|
icd_str->tachy_2_cnt = 0; //счётчик Тахикардии 2 при обнаружении короткого RR он растёт
|
||||||
|
icd_str->tachy_1_cnt = 0; //счётчик Тахикардии 1 при обнаружении короткого RR он растёт
|
||||||
|
icd_str->norm_cnt = 0;//счётчик нормальных сокращений подряд
|
||||||
|
|
||||||
|
icd_str->vp_cnt_last = 0;//сбрасываемый счётчик нормальных событий
|
||||||
|
|
||||||
|
icd_str->terapy_set = sub_off;//заданный режим терапии
|
||||||
|
icd_str->terapy_now = sub_off;//текущий режим терапии
|
||||||
|
|
||||||
|
icd_str->sub_mode = sub_off;//подрежим для индикации
|
||||||
|
|
||||||
|
icd_str->hv_step_number = HV_STEP_NUM;//сколько шагов ВВ терапии?
|
||||||
|
icd_str->hv_step_cnt = 0;// какой сейчас шаг?
|
||||||
|
|
||||||
|
icd_str->min_energy = MIN_ENERGY;
|
||||||
|
icd_str->max_energy = MAX_ENERGY;
|
||||||
|
icd_str->cap_pol = cap_poz;
|
||||||
|
|
||||||
|
icd_str->hv_blind_time = (HV_BLIND_TIME_MS * DATA_RATE)/1000;//время которое мы слепы после HV разряда
|
||||||
|
|
||||||
|
icd_str->redet_num = REDET_BUF_LEN; //какой длинны мы заполныем буффер при редетекции
|
||||||
|
icd_str->redet_bad = REDET_BAD_MAX; //сколько нам нужно плохих событий для запуска терапии
|
||||||
|
|
||||||
|
icd_str->standby_timer = STANDBY_TIME_MS;//сколько отдыхать после неудачного подавления фибриляции
|
||||||
|
icd_str->spi_pot_set = 6;
|
||||||
|
}
|
||||||
|
|
||||||
|
float my_abs(float a)
|
||||||
|
{
|
||||||
|
return (a<0)? -a:a;
|
||||||
|
}
|
||||||
|
|
||||||
|
// первичный заход в режим fixme обернуть в функцию
|
||||||
|
bool mode_start(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
if (icd_str->search_now_mode != icd_str->search_set_mode)
|
||||||
|
{
|
||||||
|
icd_str->search_now_mode = icd_str->search_set_mode;
|
||||||
|
// обнулили счётчик режима
|
||||||
|
icd_str->mode_cnt = 0;
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
void get_data(icd_str * icd_str,uint16_t input)
|
||||||
|
{
|
||||||
|
float raw = ((float)input) * VOLT_COEF;//перевод в милливольты
|
||||||
|
// icd_str->ecg_rv_filt = iir_50hz_2or(raw);
|
||||||
|
// icd_str->ecg_rv_filt = iir_4060(raw);
|
||||||
|
if(icd_str->filter_on)
|
||||||
|
icd_str->ecg_rv_filt = iir_lp30(raw);
|
||||||
|
else
|
||||||
|
icd_str->ecg_rv_filt = raw;
|
||||||
|
|
||||||
|
icd_str->ecg_rv_mov_av = (1 - MOV_AV_COEF)*icd_str->ecg_rv_mov_av + MOV_AV_COEF * icd_str->ecg_rv_filt;
|
||||||
|
icd_str->ecg_rv_pos_sig = my_abs(icd_str->ecg_rv_filt-icd_str->ecg_rv_mov_av);
|
||||||
|
}
|
||||||
|
|
||||||
|
void get_data_max30003(icd_str * icd_str,int32_t input)
|
||||||
|
{
|
||||||
|
//перрвичная обработка сигналов
|
||||||
|
float raw = ((float)input/256.0)* VOLT_COEF_MAX30003;//перевод в милливольты
|
||||||
|
icd_str->ecg_rv_filt = iir_50hz_2or(raw);
|
||||||
|
icd_str->ecg_rv_mov_av = (1 - MOV_AV_COEF)*icd_str->ecg_rv_mov_av + MOV_AV_COEF * icd_str->ecg_rv_filt;
|
||||||
|
icd_str->ecg_rv_pos_sig = my_abs(icd_str->ecg_rv_filt-icd_str->ecg_rv_mov_av);
|
||||||
|
}
|
||||||
|
|
||||||
|
// проверка длительности определённого режима
|
||||||
|
// указваем какой режим выставить
|
||||||
|
bool check_mode_len(icd_str * icd_str,uint16_t base_time, search_mode mode_to_set)
|
||||||
|
{
|
||||||
|
// Проверка превышения времени на режим
|
||||||
|
//if(icd_str->mode_cnt > base_time)//fixme так было раньше
|
||||||
|
if(icd_str->mode_cnt > base_time || icd_str->last_RR_poz_rel > icd_str->max_time)
|
||||||
|
{
|
||||||
|
icd_str->mode_cnt = 0;
|
||||||
|
// перешли в режим низковольтной стимуляции
|
||||||
|
icd_str->search_set_mode = mode_to_set;
|
||||||
|
if(mode_to_set == Mode_stimulation_LV)
|
||||||
|
{
|
||||||
|
icd_str->vp_cnt_last++;
|
||||||
|
// период чсс равен времени с прошлого события
|
||||||
|
icd_str->last_period = icd_str->last_RR_poz_rel;
|
||||||
|
// стёрли счётчик до прошлого события т.к. оно только что произошло
|
||||||
|
icd_str->last_RR_poz_rel = 0;
|
||||||
|
|
||||||
|
icd_str->last_QRS = Vpace;
|
||||||
|
// стёрли счётчик до прошлого события т.к. оно только что произошло
|
||||||
|
icd_str->last_RR_poz_rel = 0;
|
||||||
|
// инкримент счётчика Vpace событий
|
||||||
|
icd_str->Vp_cnt++;
|
||||||
|
}
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// проверка пересечения порога
|
||||||
|
bool check_tres(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
// Проверка превышения порога
|
||||||
|
if((icd_str->ecg_rv_pos_sig >= icd_str->ecg_rv_din_treshold) && icd_str->work_set_mode != Monitor)
|
||||||
|
{
|
||||||
|
// перешли в режим поисков пиков
|
||||||
|
icd_str->search_set_mode = Mode_search_MAX;
|
||||||
|
// событие нормальное
|
||||||
|
icd_str->last_QRS = Vsense;
|
||||||
|
// тетрарная операция находим не выходит ли за границы наш экг сигнал
|
||||||
|
icd_str->last_RR_amp = icd_str->ecg_rv_pos_sig >= icd_str->max_tres ? icd_str->max_tres : icd_str->ecg_rv_pos_sig;
|
||||||
|
icd_str->ecg_rv_din_treshold = icd_str->last_RR_amp;//fixme новое борьба с неправильным динамическим порогом
|
||||||
|
// период чсс равен времени с прошлого события
|
||||||
|
icd_str->last_period = icd_str->last_RR_poz_rel;
|
||||||
|
// стёрли счётчик до прошлого события т.к. оно только что произошло
|
||||||
|
icd_str->last_RR_poz_rel = 0;
|
||||||
|
|
||||||
|
// инкримент счётчика Vsense событий
|
||||||
|
icd_str->Vs_cnt++;
|
||||||
|
icd_str->vs_cnt_last++;
|
||||||
|
//сейчас сокращение сердца
|
||||||
|
icd_str->rr_now = true;
|
||||||
|
// Если мы в нормальном режиме не терапии
|
||||||
|
if(icd_str->terapy_now == Terapy_off)
|
||||||
|
{
|
||||||
|
icd_str->filt_period = moving_avarage(icd_str->last_period);
|
||||||
|
if(icd_str->vs_cnt_last >= 10)
|
||||||
|
{
|
||||||
|
basket_alg(icd_str);
|
||||||
|
}
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
else if(icd_str->terapy_now == Terapy_fibr && icd_str->sub_mode == sub_redet)
|
||||||
|
{
|
||||||
|
//инкрементируем счётчик Vs
|
||||||
|
icd_str->redet_cnt++;
|
||||||
|
//если период меньше положенного
|
||||||
|
if(icd_str->last_period< icd_str->tachy_1_tres)
|
||||||
|
{
|
||||||
|
icd_str->redet_bad_cnt++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
//алгоритм поиска QRS комплексов
|
||||||
|
void search_alg(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
//инкрементируем глобальный счётчик
|
||||||
|
icd_str->counter++;//
|
||||||
|
icd_str->last_RR_poz_rel++;//новое fixme
|
||||||
|
//сейчас не сокращение сердца
|
||||||
|
icd_str->rr_now = false;
|
||||||
|
switch (icd_str->search_set_mode)
|
||||||
|
{
|
||||||
|
case Mode_start_UP:
|
||||||
|
{
|
||||||
|
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case Mode_search_BASE:
|
||||||
|
{
|
||||||
|
// первичный заход в режим
|
||||||
|
if(mode_start(icd_str))
|
||||||
|
icd_str->ecg_rv_din_treshold = icd_str->min_tres;
|
||||||
|
|
||||||
|
// проверка длительности режима функцией если превышена вывалиться из функции
|
||||||
|
if(check_mode_len(icd_str,icd_str->base_time,Mode_stimulation_LV))
|
||||||
|
return;
|
||||||
|
// проверка пересечения порога
|
||||||
|
if(check_tres(icd_str))
|
||||||
|
return;
|
||||||
|
icd_str->mode_cnt++;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case Mode_search_SQUARE:
|
||||||
|
{
|
||||||
|
// первичный заход в режим fixme обернуть в функцию
|
||||||
|
if(mode_start(icd_str))
|
||||||
|
icd_str->ecg_rv_din_treshold = icd_str->ecg_rv_din_treshold * icd_str->square_coef > icd_str->min_tres ?
|
||||||
|
icd_str->ecg_rv_din_treshold * icd_str->square_coef : icd_str->min_tres;
|
||||||
|
// проверка длительности режима функцией если превышена вывалиться из функции
|
||||||
|
if (check_mode_len(icd_str, icd_str->square_time, Mode_search_TRIANGLE))
|
||||||
|
return;
|
||||||
|
// проверка пересечения порога
|
||||||
|
if (check_tres(icd_str))
|
||||||
|
return;
|
||||||
|
icd_str->mode_cnt++;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case Mode_search_TRIANGLE:
|
||||||
|
{
|
||||||
|
// первичный заход в режим
|
||||||
|
mode_start(icd_str);
|
||||||
|
// если время шага прошло
|
||||||
|
if((icd_str->mode_cnt % icd_str->triangle_step_time) == 0)
|
||||||
|
{
|
||||||
|
icd_str->ecg_rv_din_treshold = icd_str->ecg_rv_din_treshold * icd_str->triangle_coef > icd_str->min_tres ?
|
||||||
|
icd_str->ecg_rv_din_treshold * icd_str->triangle_coef : icd_str->min_tres;
|
||||||
|
}
|
||||||
|
|
||||||
|
// проверка длительности режима функцией если превышена вывалиться из функции
|
||||||
|
if (check_mode_len(icd_str, icd_str->triangle_time, Mode_search_BASE))
|
||||||
|
return;
|
||||||
|
// проверка пересечения порога
|
||||||
|
if (check_tres(icd_str))
|
||||||
|
return;
|
||||||
|
icd_str->mode_cnt++;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case Mode_search_MAX://FIXME криво считаем!!!!!!!!!!!!!!!
|
||||||
|
{
|
||||||
|
// первичный заход в режим
|
||||||
|
if(mode_start(icd_str))
|
||||||
|
{
|
||||||
|
}
|
||||||
|
//если сигнал выше найденного максимума
|
||||||
|
if(icd_str->ecg_rv_pos_sig > icd_str->last_RR_amp)
|
||||||
|
{
|
||||||
|
//выше верхнего порога//fixme тут косяк
|
||||||
|
//if(icd_str->ecg_rv_pos_sig > icd_str->ecg_rv_din_treshold) fixme вроде тут косяк был
|
||||||
|
if(icd_str->ecg_rv_pos_sig > icd_str->max_tres)
|
||||||
|
{
|
||||||
|
icd_str->ecg_rv_din_treshold = icd_str->max_tres;
|
||||||
|
icd_str->last_RR_amp = icd_str->max_tres;
|
||||||
|
}
|
||||||
|
//в норм границах
|
||||||
|
else
|
||||||
|
{
|
||||||
|
icd_str->ecg_rv_din_treshold = icd_str->ecg_rv_pos_sig;
|
||||||
|
icd_str->last_RR_amp = icd_str->ecg_rv_pos_sig;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if(icd_str->mode_cnt > icd_str->max_search_time)
|
||||||
|
{
|
||||||
|
// сбросили счётчик
|
||||||
|
icd_str->mode_cnt = 0;
|
||||||
|
// перешли в режим поиска квадратный
|
||||||
|
icd_str->search_set_mode = Mode_search_SQUARE;
|
||||||
|
}
|
||||||
|
icd_str->mode_cnt++;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case Mode_stimulation_LV:
|
||||||
|
{
|
||||||
|
// первичный заход в режим
|
||||||
|
if(mode_start(icd_str))
|
||||||
|
{
|
||||||
|
//сбросили параметр так как не было события сердца
|
||||||
|
icd_str->norm_cnt = 0;
|
||||||
|
//сейчас сокращение сердца
|
||||||
|
icd_str->rr_now = true;
|
||||||
|
if(icd_str->LV_on)
|
||||||
|
{
|
||||||
|
//предварительная насторойка включение повышайки инициализация DAC
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//тут по идее нужно стимулировать если это разрешено
|
||||||
|
if(icd_str->LV_on && icd_str->mode_cnt < icd_str->lv_start_time)
|
||||||
|
{
|
||||||
|
//начало стимуляции
|
||||||
|
}
|
||||||
|
//тут по идее нужно стимулировать если это разрешено
|
||||||
|
if(icd_str->LV_on && icd_str->mode_cnt > icd_str->lv_stop_time)
|
||||||
|
{
|
||||||
|
//конец стимуляции дальше ждём восстановления сигнала
|
||||||
|
}
|
||||||
|
|
||||||
|
if(icd_str->mode_cnt > icd_str->lv_mode_time)
|
||||||
|
{
|
||||||
|
// сбросили счётчик
|
||||||
|
icd_str->mode_cnt = 0;//по идее не нужно всё равно сбросим при первичном заходе
|
||||||
|
// перешли в режим поиска квадратный
|
||||||
|
icd_str->search_set_mode = Mode_search_SQUARE;
|
||||||
|
}
|
||||||
|
icd_str->mode_cnt++;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case Mode_stimulation_HV:
|
||||||
|
{
|
||||||
|
if(mode_start(icd_str))
|
||||||
|
{
|
||||||
|
//сбросили параметр так как не было события сердца
|
||||||
|
icd_str->norm_cnt = 0;
|
||||||
|
}
|
||||||
|
icd_str->ecg_rv_pos_sig = 0.0;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t moving_avarage(uint16_t data)
|
||||||
|
{
|
||||||
|
static uint16_t buf[10];
|
||||||
|
static uint8_t b_pointer = 0;
|
||||||
|
|
||||||
|
buf[b_pointer] = data;
|
||||||
|
b_pointer++;
|
||||||
|
if(b_pointer >= 10)
|
||||||
|
{
|
||||||
|
b_pointer = 0;
|
||||||
|
}
|
||||||
|
uint16_t sum = 0;
|
||||||
|
for(int i =0; i<10; i++)
|
||||||
|
sum += buf[i];
|
||||||
|
return sum/10;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Алгоритм корзин по идее должен вызываться при обнаружении новго события
|
||||||
|
// Едиственный смысл в нём это переход в другой режим не простого поиска а стимуляции
|
||||||
|
void basket_alg(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
if(icd_str->filt_period < icd_str->fibr_tres)
|
||||||
|
{
|
||||||
|
icd_str->fibr_cnt++;
|
||||||
|
icd_str->norm_cnt = 0;
|
||||||
|
if(icd_str->fibr_cnt > icd_str->fibr_max_tres)//fixme
|
||||||
|
//if(icd_str->filt_period > icd_str->fibr_max_tres)//если набрали много событий нужно лечить
|
||||||
|
{
|
||||||
|
//fixme по идее тоже обнуляем т.к. уже в жопном режиме
|
||||||
|
icd_str->fibr_cnt = 0;
|
||||||
|
icd_str->tachy_2_cnt = 0;
|
||||||
|
icd_str->tachy_1_cnt = 0;
|
||||||
|
// перешли в режим терапии
|
||||||
|
icd_str->terapy_set = Terapy_fibr;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else if((icd_str->filt_period >= icd_str->fibr_tres)&&(icd_str->last_period < icd_str->tachy_2_tres))
|
||||||
|
{
|
||||||
|
icd_str->tachy_2_cnt++;
|
||||||
|
icd_str->norm_cnt = 0;
|
||||||
|
}
|
||||||
|
else if((icd_str->filt_period >= icd_str->tachy_2_tres)&&(icd_str->last_period < icd_str->tachy_1_tres))
|
||||||
|
{
|
||||||
|
icd_str->tachy_1_cnt++;
|
||||||
|
icd_str->norm_cnt = 0;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
icd_str->norm_cnt++;
|
||||||
|
//5 нормальных сокращений подряд можно сбросить корзины
|
||||||
|
if(icd_str->norm_cnt >= 5)
|
||||||
|
{
|
||||||
|
icd_str->fibr_cnt = 0;
|
||||||
|
icd_str->tachy_2_cnt = 0;
|
||||||
|
icd_str->tachy_1_cnt = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
bool terapy_start(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
if (icd_str->terapy_now != icd_str->terapy_set)
|
||||||
|
{
|
||||||
|
icd_str->terapy_now = icd_str->terapy_set;
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
void hv_pwm(bool state)
|
||||||
|
{
|
||||||
|
if(state)//Если хотим генерировать
|
||||||
|
{
|
||||||
|
#if (MK_TYPE == F412)
|
||||||
|
TIM3->CCR1 = 675;
|
||||||
|
#else
|
||||||
|
TIM2->CCR2 = 900;//900 было
|
||||||
|
// TIM2->CCR2 = 875;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
#if (MK_TYPE == F412)
|
||||||
|
TIM3->CCR1 = 749;
|
||||||
|
#else
|
||||||
|
TIM2->CCR2 = 999;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void ll_shock(bool state)
|
||||||
|
{
|
||||||
|
if(state)//Если хотим генерировать
|
||||||
|
{
|
||||||
|
#if (MK_TYPE == F412)
|
||||||
|
HAL_GPIO_WritePin(HV_N_1_GPIO_Port, HV_N_1_Pin, GPIO_PIN_RESET);
|
||||||
|
#else
|
||||||
|
HAL_GPIO_WritePin(HV_SHOCK_GPIO_Port, HV_SHOCK_Pin, GPIO_PIN_RESET);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
#if (MK_TYPE == F412)
|
||||||
|
HAL_GPIO_WritePin(HV_N_1_GPIO_Port, HV_N_1_Pin, GPIO_PIN_SET);
|
||||||
|
#else
|
||||||
|
HAL_GPIO_WritePin(HV_SHOCK_GPIO_Port, HV_SHOCK_Pin, GPIO_PIN_SET);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
//функция заряда Конденсатора
|
||||||
|
void hv_charge(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
icd_str->sub_mode = sub_cap_ch;//
|
||||||
|
//питание выключено
|
||||||
|
HAL_GPIO_WritePin(HV_PWR_EN_GPIO_Port, HV_PWR_EN_Pin, GPIO_PIN_SET);
|
||||||
|
//плавный разряд выключен
|
||||||
|
HAL_GPIO_WritePin(HV_DIS_GPIO_Port, HV_DIS_Pin, GPIO_PIN_SET);
|
||||||
|
//шок выключен
|
||||||
|
ll_shock(false);
|
||||||
|
|
||||||
|
hv_pwm(true);
|
||||||
|
//подали питание на плату только если не в режиме мониторинга
|
||||||
|
if(icd_str->work_set_mode == Monitor)
|
||||||
|
{ //питания нет
|
||||||
|
HAL_GPIO_WritePin(HV_PWR_EN_GPIO_Port, HV_PWR_EN_Pin, GPIO_PIN_SET);
|
||||||
|
// и генерации нет
|
||||||
|
hv_pwm(false);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if(DANGER_HV)
|
||||||
|
HAL_GPIO_WritePin(HV_PWR_EN_GPIO_Port, HV_PWR_EN_Pin, GPIO_PIN_RESET);
|
||||||
|
else
|
||||||
|
HAL_GPIO_WritePin(HV_PWR_EN_GPIO_Port, HV_PWR_EN_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
|
}
|
||||||
|
//заряд через транзистор
|
||||||
|
//включили шим 32кГц выключили любой разряд
|
||||||
|
//энергия заряда пропорциональна времени
|
||||||
|
//40 джоулей в нашем случае 400 т.к у нас десятые доли джоулей можно задавать
|
||||||
|
//набирает примерно за 15 сек 40 Дж при 560мкФ соответственно 2.667 дж в сек округлим до 2.7 потом поправить
|
||||||
|
//т.к. энергия в десятых джоулях 40дж = 400 т=(400/10)*(1000/2.667) и если упростить, нам просто нужно умножать на 37
|
||||||
|
//время для заряда до 40 дж = (E*1000/k)
|
||||||
|
// 5дж наберутся за 1850 мс, что норм.
|
||||||
|
//если плата с новым мк
|
||||||
|
#if (CAP_VOLT_CTRL && (MK_TYPE == F412))
|
||||||
|
{
|
||||||
|
int i = 0;
|
||||||
|
float voltage = sqrt(icd_str->now_energy*0.2/CAPACITY);
|
||||||
|
uint16_t voltage_i= (uint16_t)(voltage*10.5);//умножаем на 12 а не на 10 т.к. напряжение после выключения заряда слегка просаживается.
|
||||||
|
while(i < 50)
|
||||||
|
{
|
||||||
|
i++;
|
||||||
|
osDelay(icd_str->now_energy);
|
||||||
|
if(adc_str.hv_volt > voltage_i)
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
osDelay(icd_str->now_energy*32);
|
||||||
|
#endif
|
||||||
|
//отключили шим
|
||||||
|
hv_pwm(false);
|
||||||
|
//питание выключено
|
||||||
|
HAL_GPIO_WritePin(HV_PWR_EN_GPIO_Port, HV_PWR_EN_Pin, GPIO_PIN_SET);
|
||||||
|
//отключили заряд конденсатора
|
||||||
|
}
|
||||||
|
|
||||||
|
//функция плавного разряда Конденсатора
|
||||||
|
void hv_discharge(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
//плавный разряд включен
|
||||||
|
HAL_GPIO_WritePin(HV_DIS_GPIO_Port, HV_DIS_Pin, GPIO_PIN_RESET);
|
||||||
|
//включили разяд конденсатора
|
||||||
|
// osDelay(icd_str->now_energy*20);//было *15
|
||||||
|
osDelay(5000);//было *15
|
||||||
|
//отключили разяд конденсатора
|
||||||
|
}
|
||||||
|
|
||||||
|
//функция резкого разряда
|
||||||
|
void hv_shock(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
icd_str->sub_mode = sub_shock;
|
||||||
|
icd_str->search_set_mode = Mode_stimulation_HV;
|
||||||
|
|
||||||
|
//включили режим слепоты
|
||||||
|
osDelay(100);
|
||||||
|
//подали питание на плату только если не в режиме мониторинга
|
||||||
|
if(icd_str->work_set_mode != Monitor)//fixme
|
||||||
|
{
|
||||||
|
//шок включен
|
||||||
|
ll_shock(true);
|
||||||
|
osDelay(15);
|
||||||
|
if(LAMP)
|
||||||
|
osDelay(200);//доп задержка при использовании лампы
|
||||||
|
}
|
||||||
|
else
|
||||||
|
ll_shock(false);//шок выключен
|
||||||
|
|
||||||
|
//плавный разряд включен
|
||||||
|
HAL_GPIO_WritePin(HV_DIS_GPIO_Port, HV_DIS_Pin, GPIO_PIN_RESET);
|
||||||
|
// ничего не анализируем сколько-то времени
|
||||||
|
osDelay(icd_str->hv_blind_time*5);
|
||||||
|
//отключили режим слепоты
|
||||||
|
icd_str->search_set_mode = Mode_search_SQUARE;
|
||||||
|
}
|
||||||
|
|
||||||
|
//быстрое определение нужно ли бить током
|
||||||
|
bool quick_anal(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
osDelay(icd_str->hv_blind_time*5);
|
||||||
|
//сбросили счётчики редетекции
|
||||||
|
//icd_str->Vs_cnt = 0;
|
||||||
|
icd_str->redet_cnt = 0;
|
||||||
|
icd_str->redet_bad_cnt = 0;
|
||||||
|
|
||||||
|
icd_str->sub_mode = sub_redet;
|
||||||
|
icd_str->vs_cnt_last = 0;//сбросили количество нормальных событий перед анализом
|
||||||
|
icd_str->vp_cnt_last = 0;//сбросили количество НЕнормальных событий перед анализом
|
||||||
|
|
||||||
|
//если у нас принудителная стимуляция ждём чуть-чуть и фигачим
|
||||||
|
if(icd_str->work_set_mode == Force)
|
||||||
|
{
|
||||||
|
osDelay(FORCE_DELAY);
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
//очистка всех событий из памяти
|
||||||
|
// ожидание с периодом 10мс нет ли достаточного кол-ва событий
|
||||||
|
// Тут по идее можно добавить счётчик времени вдруг Vs нет.
|
||||||
|
// fixme раньше учитывали только Vs события
|
||||||
|
while((icd_str->vs_cnt_last + icd_str->vp_cnt_last) < icd_str->redet_num)
|
||||||
|
{
|
||||||
|
//do nothing
|
||||||
|
osDelay(10);
|
||||||
|
}
|
||||||
|
|
||||||
|
//проверка не превысили ли мы порог плохих сокращений
|
||||||
|
if(icd_str->redet_bad_cnt > icd_str->redet_bad)
|
||||||
|
{
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void fibr_terapy(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
for(icd_str->hv_step_cnt = 0; icd_str->hv_step_cnt < icd_str->hv_step_number; )
|
||||||
|
{
|
||||||
|
icd_str->hv_step_cnt++;
|
||||||
|
//расчёт энергии шага
|
||||||
|
icd_str->hv_step_energy = (icd_str->max_energy-icd_str->min_energy)/(icd_str->hv_step_number-1);
|
||||||
|
|
||||||
|
//icd_str->now_energy = icd_str->min_energy + (icd_str->hv_step_cnt-1) * icd_str->hv_step_energy;
|
||||||
|
icd_str->now_energy = icd_str->max_energy;//fixme для опыта
|
||||||
|
//активировать терапию низковольтную если задана (у нас такого пока нет) fixme
|
||||||
|
//затем производим зарядку конденсатора
|
||||||
|
hv_charge(icd_str);
|
||||||
|
|
||||||
|
//ждём пока наберётся Х событий для анализа
|
||||||
|
if(!quick_anal(icd_str))//если всё ОК
|
||||||
|
{
|
||||||
|
hv_discharge(icd_str);
|
||||||
|
//сброс параметров и переход в режим
|
||||||
|
icd_str->terapy_set = Terapy_off;
|
||||||
|
//выходим нафиг из цикла
|
||||||
|
icd_str->sub_mode = sub_off;
|
||||||
|
icd_str->now_energy = 0;
|
||||||
|
icd_str->hv_step_cnt = 0;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//должны ещё вырубить анализ с АЦП и пихать в него среднее чтоб скользящее нахер не улетело
|
||||||
|
hv_shock(icd_str);
|
||||||
|
//опять проверяем на нормальность цикла если всё ок возвращаемся в норм режим
|
||||||
|
if(!quick_anal(icd_str))//если всё ОК
|
||||||
|
{
|
||||||
|
hv_discharge(icd_str);
|
||||||
|
//сброс параметров и переход в режим
|
||||||
|
icd_str->terapy_set = Terapy_off;
|
||||||
|
//выходим нафиг из цикла
|
||||||
|
icd_str->sub_mode = sub_off;
|
||||||
|
icd_str->now_energy = 0;
|
||||||
|
icd_str->hv_step_cnt = 0;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
//если прошлись по всем шагам а ритм всё равно говно
|
||||||
|
if(icd_str->hv_step_cnt >= icd_str->hv_step_number)
|
||||||
|
{
|
||||||
|
icd_str->sub_mode = sub_stim_fail;
|
||||||
|
icd_str->now_energy = 0;
|
||||||
|
icd_str->hv_step_cnt = 0;
|
||||||
|
hv_discharge(icd_str);
|
||||||
|
if(icd_str->work_set_mode == Force)
|
||||||
|
{
|
||||||
|
icd_str->work_set_mode = Monitor;//перешли в режим Мониторинга
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
osDelay(icd_str->standby_timer);//сброс всего и долгая зажержка
|
||||||
|
}
|
||||||
|
//сброс параметров и переход в режим
|
||||||
|
icd_str->terapy_set = Terapy_off;
|
||||||
|
icd_str->sub_mode = sub_off;
|
||||||
|
icd_str->now_energy = 0;
|
||||||
|
icd_str->hv_step_cnt = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void terapy_algorithm(icd_str * icd_str)
|
||||||
|
{
|
||||||
|
//если выбран режим принудительный//fixme
|
||||||
|
if(icd_str->work_set_mode == Force)
|
||||||
|
{
|
||||||
|
icd_str->terapy_set = Terapy_fibr;
|
||||||
|
}
|
||||||
|
switch (icd_str->terapy_set)
|
||||||
|
{
|
||||||
|
case Terapy_off:
|
||||||
|
{
|
||||||
|
// первичный заход в режим
|
||||||
|
if(terapy_start(icd_str))
|
||||||
|
{
|
||||||
|
icd_str->hv_step_cnt = 0;
|
||||||
|
//подготовка к нормальному режиму разрядка Конденсатора на всякий случай
|
||||||
|
// настройка режима нормамльного поиска пиков
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
// самое жесткое лечение
|
||||||
|
case Terapy_fibr:
|
||||||
|
{
|
||||||
|
// первичный заход в режим
|
||||||
|
if(terapy_start(icd_str))
|
||||||
|
{
|
||||||
|
//подготовка к терапии
|
||||||
|
}
|
||||||
|
fibr_terapy(icd_str);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case Terapy_tachy_2:
|
||||||
|
{
|
||||||
|
// первичный заход в режим
|
||||||
|
if(terapy_start(icd_str))
|
||||||
|
{
|
||||||
|
//пока не активен
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case Terapy_tachy_1:
|
||||||
|
{
|
||||||
|
// первичный заход в режим
|
||||||
|
if(terapy_start(icd_str))
|
||||||
|
{
|
||||||
|
//пока не активен
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
240
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/main.c
Normal file
240
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/main.c
Normal file
@ -0,0 +1,240 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file : main.c
|
||||||
|
* @brief : Main program body
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
#include "cmsis_os.h"
|
||||||
|
#include "adc.h"
|
||||||
|
#include "dma.h"
|
||||||
|
#include "tim.h"
|
||||||
|
#include "usart.h"
|
||||||
|
#include "gpio.h"
|
||||||
|
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
#include "control.h"
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PTD */
|
||||||
|
|
||||||
|
/* USER CODE END PTD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PD */
|
||||||
|
|
||||||
|
/* USER CODE END PD */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PM */
|
||||||
|
extern adc_struct adc_str;//структура ацп
|
||||||
|
extern ctrl_struct Control; //FLASH (rx)
|
||||||
|
/* USER CODE END PM */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
|
/* USER CODE END PV */
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
void SystemClock_Config(void);
|
||||||
|
void MX_FREERTOS_Init(void);
|
||||||
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
|
/* USER CODE END PFP */
|
||||||
|
|
||||||
|
/* Private user code ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief The application entry point.
|
||||||
|
* @retval int
|
||||||
|
*/
|
||||||
|
int main(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
control_init();
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
|
/* MCU Configuration--------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||||||
|
HAL_Init();
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Init */
|
||||||
|
|
||||||
|
/* USER CODE END Init */
|
||||||
|
|
||||||
|
/* Configure the system clock */
|
||||||
|
SystemClock_Config();
|
||||||
|
|
||||||
|
/* USER CODE BEGIN SysInit */
|
||||||
|
|
||||||
|
/* USER CODE END SysInit */
|
||||||
|
|
||||||
|
/* Initialize all configured peripherals */
|
||||||
|
MX_GPIO_Init();
|
||||||
|
MX_DMA_Init();
|
||||||
|
MX_ADC1_Init();
|
||||||
|
MX_USART1_UART_Init();
|
||||||
|
MX_TIM3_Init();
|
||||||
|
MX_TIM2_Init();
|
||||||
|
/* USER CODE BEGIN 2 */
|
||||||
|
ble_control(&Control);
|
||||||
|
HAL_TIM_Base_Start_IT(&htim3);
|
||||||
|
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2);
|
||||||
|
/* USER CODE END 2 */
|
||||||
|
|
||||||
|
/* Call init function for freertos objects (in cmsis_os2.c) */
|
||||||
|
MX_FREERTOS_Init();
|
||||||
|
|
||||||
|
/* Start scheduler */
|
||||||
|
osKernelStart();
|
||||||
|
|
||||||
|
/* We should never get here as control is now taken by the scheduler */
|
||||||
|
|
||||||
|
/* Infinite loop */
|
||||||
|
/* USER CODE BEGIN WHILE */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE END WHILE */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 3 */
|
||||||
|
// HAL_Delay(2);
|
||||||
|
// HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
|
||||||
|
// adc_read(&adc_str);
|
||||||
|
//// print_usart("Fuck_ypu\n");
|
||||||
|
// ble_HEX(&Control,&adc_str,true);
|
||||||
|
HAL_Delay(200);
|
||||||
|
}
|
||||||
|
/* USER CODE END 3 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System Clock Configuration
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemClock_Config(void)
|
||||||
|
{
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||||||
|
|
||||||
|
/** Initializes the RCC Oscillators according to the specified parameters
|
||||||
|
* in the RCC_OscInitTypeDef structure.
|
||||||
|
*/
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||||
|
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/** Initializes the CPU, AHB and APB buses clocks
|
||||||
|
*/
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||||
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
|
||||||
|
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 4 */
|
||||||
|
|
||||||
|
|
||||||
|
/* USER CODE END 4 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Period elapsed callback in non blocking mode
|
||||||
|
* @note This function is called when TIM4 interrupt took place, inside
|
||||||
|
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
|
||||||
|
* a global variable "uwTick" used as application time base.
|
||||||
|
* @param htim : TIM handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN Callback 0 */
|
||||||
|
|
||||||
|
/* USER CODE END Callback 0 */
|
||||||
|
if (htim->Instance == TIM4) {
|
||||||
|
HAL_IncTick();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN Callback 1 */
|
||||||
|
if(htim->Instance == TIM3)
|
||||||
|
{
|
||||||
|
HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
|
||||||
|
adc_read(&adc_str);
|
||||||
|
// print_usart("Fuck_ypu\n");
|
||||||
|
//ble_HEX(&Control, &adc_str, true);
|
||||||
|
}
|
||||||
|
/* USER CODE END Callback 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function is executed in case of error occurrence.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void Error_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN Error_Handler_Debug */
|
||||||
|
/* User can add his own implementation to report the HAL error return state */
|
||||||
|
__disable_irq();
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
/* USER CODE END Error_Handler_Debug */
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
/**
|
||||||
|
* @brief Reports the name of the source file and the source line number
|
||||||
|
* where the assert_param error has occurred.
|
||||||
|
* @param file: pointer to the source file name
|
||||||
|
* @param line: assert_param error line source number
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void assert_failed(uint8_t *file, uint32_t line)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN 6 */
|
||||||
|
/* User can add his own implementation to report the file name and line number,
|
||||||
|
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
||||||
|
/* USER CODE END 6 */
|
||||||
|
}
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
444
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/parse.c
Normal file
444
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/parse.c
Normal file
@ -0,0 +1,444 @@
|
|||||||
|
#include "parse.h"
|
||||||
|
|
||||||
|
float unpackFloat(const void *buf)
|
||||||
|
{
|
||||||
|
const unsigned char *b = (const unsigned char *)buf;
|
||||||
|
uint32_t temp = 0;
|
||||||
|
temp = ((b[0] << 24) |
|
||||||
|
(b[1] << 16) |
|
||||||
|
(b[2] << 8) |
|
||||||
|
b[3]);
|
||||||
|
return *((float *) &temp);
|
||||||
|
}
|
||||||
|
|
||||||
|
bool check_float(float data_in, float data_min, float data_max)
|
||||||
|
{
|
||||||
|
if((data_in >= data_min) && (data_in <= data_max))
|
||||||
|
{
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t unpackUint16(const void *buf)
|
||||||
|
{
|
||||||
|
const unsigned char *b = (const unsigned char *)buf;
|
||||||
|
uint16_t temp = 0;
|
||||||
|
temp = ((b[2] << 8) | b[3]);
|
||||||
|
return *((uint16_t *) &temp);
|
||||||
|
}
|
||||||
|
|
||||||
|
bool check_uint16(uint16_t data_in, uint16_t data_min, uint16_t data_max)
|
||||||
|
{
|
||||||
|
if((data_in >= data_min) && (data_in <= data_max))
|
||||||
|
{
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t unpackUint8(const void *buf)
|
||||||
|
{
|
||||||
|
const unsigned char *b = (const unsigned char *)buf;
|
||||||
|
uint8_t temp = 0;
|
||||||
|
temp = b[3];
|
||||||
|
return *((uint8_t *) &temp);
|
||||||
|
}
|
||||||
|
|
||||||
|
bool check_uint8(uint8_t data_in, uint8_t data_min, uint8_t data_max)
|
||||||
|
{
|
||||||
|
if((data_in >= data_min) && (data_in <= data_max))
|
||||||
|
{
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t unpackUint32(const void *buf)
|
||||||
|
{
|
||||||
|
const unsigned char *b = (const unsigned char *)buf;
|
||||||
|
uint32_t temp = 0;
|
||||||
|
temp = ((b[0] << 24) |
|
||||||
|
(b[1] << 16) |
|
||||||
|
(b[2] << 8) |
|
||||||
|
b[3]);
|
||||||
|
return *((uint32_t *) &temp);
|
||||||
|
}
|
||||||
|
|
||||||
|
bool check_uint32(uint32_t data_in, uint32_t data_min, uint32_t data_max)
|
||||||
|
{
|
||||||
|
if((data_in >= data_min) && (data_in <= data_max))
|
||||||
|
{
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
void parse_command(uint8_t* buf, icd_str * icd_str)
|
||||||
|
{
|
||||||
|
float fdata = -1.0;
|
||||||
|
if((buf[0] == 0x55) && (buf[6] == 0x77))
|
||||||
|
{
|
||||||
|
switch (buf[1])
|
||||||
|
{
|
||||||
|
//float min_tres
|
||||||
|
case 0x01:
|
||||||
|
{
|
||||||
|
fdata = unpackFloat(&buf[2]);
|
||||||
|
if(check_float(fdata, 0.1, 10.0))//fixme сделал большую вариабельность
|
||||||
|
{
|
||||||
|
if(fdata < icd_str->max_tres)
|
||||||
|
// проверили что меньше максимального порога
|
||||||
|
icd_str->min_tres = fdata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//float max_tres
|
||||||
|
case 0x02:
|
||||||
|
{
|
||||||
|
fdata = unpackFloat(&buf[2]);
|
||||||
|
if(check_float(fdata, 1.5, 20.0))//fixme сделал большую вариабельность
|
||||||
|
{
|
||||||
|
if(fdata > icd_str->min_tres)
|
||||||
|
// проверили что больше минимального порога
|
||||||
|
icd_str->max_tres = fdata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//float square_coef
|
||||||
|
case 0x03:
|
||||||
|
{
|
||||||
|
fdata = unpackFloat(&buf[2]);
|
||||||
|
if(check_float(fdata, 0.25, 0.75))
|
||||||
|
{
|
||||||
|
icd_str->square_coef = fdata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//float triangle_coef
|
||||||
|
case 0x04:
|
||||||
|
{
|
||||||
|
fdata = unpackFloat(&buf[2]);
|
||||||
|
// min max triangle coef???? const 0.85
|
||||||
|
if(check_float(fdata, 0.8, 0.9))
|
||||||
|
{
|
||||||
|
icd_str->triangle_coef = fdata;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//start_up_time
|
||||||
|
case 0x05:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 0, 2))
|
||||||
|
{
|
||||||
|
icd_str->work_set_mode = idata;
|
||||||
|
//fixme тут нужно написать сброс всего и вся
|
||||||
|
if(idata == Monitor)
|
||||||
|
{
|
||||||
|
icd_str->fibr_cnt = 0;
|
||||||
|
icd_str->tachy_2_cnt = 0;
|
||||||
|
icd_str->tachy_1_cnt = 0;
|
||||||
|
icd_str->fibr_cnt = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//base_time
|
||||||
|
case 0x06:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
// min max???? const 300
|
||||||
|
if(check_uint16(idata, 100, 400))
|
||||||
|
{
|
||||||
|
icd_str->base_time = idata/5;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//square_time
|
||||||
|
case 0x07:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
// 350
|
||||||
|
if(check_uint16(idata, 300, 400))
|
||||||
|
{
|
||||||
|
icd_str->square_time = idata/5;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//triangle_time
|
||||||
|
case 0x08:
|
||||||
|
{
|
||||||
|
// uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
// // 300
|
||||||
|
// if(check_uint16(idata, 200, 400))
|
||||||
|
// {
|
||||||
|
// icd_str->triangle_time = idata;
|
||||||
|
// }
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//triangle_step_time сделаю тут максимальное время на цикл лучше
|
||||||
|
case 0x09:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
if(check_uint16(idata, 500, 2000))//границы берём из графического интерфейса лучше переделатьь в дефайны
|
||||||
|
{
|
||||||
|
icd_str->max_time = idata/5;
|
||||||
|
}
|
||||||
|
// uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
// // 50
|
||||||
|
// if(check_uint16(idata, 40, 60))
|
||||||
|
// {
|
||||||
|
// icd_str->triangle_step_time = idata;
|
||||||
|
// }
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//lv_mode_time
|
||||||
|
case 0x0A:
|
||||||
|
{
|
||||||
|
// uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
// // ????
|
||||||
|
// if(check_uint16(idata, 40, 60))
|
||||||
|
// {
|
||||||
|
// icd_str->lv_mode_time = idata;
|
||||||
|
// }
|
||||||
|
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//lv_start_time
|
||||||
|
case 0x0B:
|
||||||
|
{
|
||||||
|
// uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
// icd_str->lv_start_time = idata;
|
||||||
|
//
|
||||||
|
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//lv_stop_time
|
||||||
|
case 0x0C:
|
||||||
|
{
|
||||||
|
// uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
// icd_str->lv_stop_time = idata;
|
||||||
|
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//max_time
|
||||||
|
case 0x0D:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
if(check_uint16(idata, 120, 200))//fixme расширю границы берём из графического интерфейса лучше переделатьь в дефайны
|
||||||
|
{
|
||||||
|
icd_str->max_search_time = idata/5;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//bool LV_on //bool HV_on
|
||||||
|
case 0x0E:
|
||||||
|
{
|
||||||
|
// не стала делать, не используется же пока
|
||||||
|
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
//fibr_tres
|
||||||
|
case 0x10:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
if(check_uint16(idata, FIBR_PERIOD_MIN, FIBR_PERIOD_MAX))
|
||||||
|
{
|
||||||
|
idata/=5;
|
||||||
|
//если меньше тахи2 и тахи 1
|
||||||
|
if((idata < icd_str->tachy_2_tres) && (idata < icd_str->tachy_1_tres))
|
||||||
|
// проверили что меньше максимального порога
|
||||||
|
icd_str->fibr_tres = idata;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//tachy_2_tres
|
||||||
|
case 0x11:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
if(check_uint16(idata, TACHY_2_PERIOD_MIN, TACHY_2_PERIOD_MAX))
|
||||||
|
{
|
||||||
|
idata/=5;
|
||||||
|
//если больше фибр и меньше тахи 1
|
||||||
|
if((idata > icd_str->fibr_tres) && (idata < icd_str->tachy_1_tres))
|
||||||
|
// проверили что меньше максимального порога
|
||||||
|
icd_str->tachy_2_tres = idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//tachy_1_tres
|
||||||
|
case 0x12:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
if(check_uint16(idata, TACHY_1_PERIOD_MIN, TACHY_1_PERIOD_MAX))
|
||||||
|
{
|
||||||
|
idata/=5;
|
||||||
|
//если больше фибр и больше тахи 2
|
||||||
|
if((idata > icd_str->fibr_tres) && (idata > icd_str->tachy_2_tres))
|
||||||
|
// проверили что меньше максимального порога
|
||||||
|
icd_str->tachy_1_tres = idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//fibr_max_tres
|
||||||
|
case 0x13:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 10, 60))
|
||||||
|
{
|
||||||
|
icd_str->fibr_max_tres = idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//hv_step_number
|
||||||
|
case 0x14:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 1, 8))
|
||||||
|
{
|
||||||
|
icd_str->hv_step_number = idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//min_energy
|
||||||
|
case 0x15:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
if(check_uint16(idata, 2, 19))
|
||||||
|
{
|
||||||
|
icd_str->min_energy = idata*10;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//max_energy
|
||||||
|
case 0x16:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
if(check_uint16(idata, 20, 80))
|
||||||
|
{
|
||||||
|
if(idata*10 > icd_str->min_energy)
|
||||||
|
icd_str->max_energy = idata*10;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//cap_polarity
|
||||||
|
case 0x17:
|
||||||
|
{
|
||||||
|
//не делала
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//hv_blind_time
|
||||||
|
case 0x18:
|
||||||
|
{
|
||||||
|
uint16_t idata = unpackUint16(&buf[2]);
|
||||||
|
if(check_uint16(idata, 100, 5000))
|
||||||
|
{
|
||||||
|
icd_str->hv_blind_time = idata/5;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//redet_num
|
||||||
|
case 0x19:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 4, 10))
|
||||||
|
{
|
||||||
|
icd_str->redet_num = idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//redet_bad
|
||||||
|
case 0x1A:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 2, 8))
|
||||||
|
{
|
||||||
|
icd_str->redet_bad = idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case 0x1B:
|
||||||
|
{
|
||||||
|
uint32_t idata = unpackUint32(&buf[2]);
|
||||||
|
if(check_uint32(idata, 10, 3600))
|
||||||
|
{
|
||||||
|
icd_str->standby_timer = idata*1000;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x1C:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 0, 255))
|
||||||
|
{
|
||||||
|
icd_str->spi_pot_set = idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x1D:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 0, 255))
|
||||||
|
{
|
||||||
|
if(idata > 0)
|
||||||
|
NVIC_SystemReset();//перезагрузка
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//с фильтром без фильтра
|
||||||
|
case 0x1E:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 0, 1))
|
||||||
|
{
|
||||||
|
icd_str->filter_on = (bool)idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
//с какой канал используем
|
||||||
|
case 0x1F:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 0, 3))
|
||||||
|
{
|
||||||
|
icd_str->active_ch = idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
//использование SD карты
|
||||||
|
case 0x20:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 0, 1))
|
||||||
|
{
|
||||||
|
icd_str->sd_card = (bool)idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
//вычитание постоянной составляющей
|
||||||
|
case 0x21:
|
||||||
|
{
|
||||||
|
uint8_t idata = unpackUint8(&buf[2]);
|
||||||
|
if(check_uint8(idata, 0, 1))
|
||||||
|
{
|
||||||
|
icd_str->dc_cut = (bool)idata;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
{
|
||||||
|
//код неверный
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
@ -0,0 +1,88 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f1xx_hal_msp.c
|
||||||
|
* @brief This file provides code for the MSP Initialization
|
||||||
|
* and de-Initialization codes.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN TD */
|
||||||
|
|
||||||
|
/* USER CODE END TD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Define */
|
||||||
|
|
||||||
|
/* USER CODE END Define */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Macro */
|
||||||
|
|
||||||
|
/* USER CODE END Macro */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
|
/* USER CODE END PV */
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
|
/* USER CODE END PFP */
|
||||||
|
|
||||||
|
/* External functions --------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN ExternalFunctions */
|
||||||
|
|
||||||
|
/* USER CODE END ExternalFunctions */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
/**
|
||||||
|
* Initializes the Global MSP.
|
||||||
|
*/
|
||||||
|
void HAL_MspInit(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END MspInit 0 */
|
||||||
|
|
||||||
|
__HAL_RCC_AFIO_CLK_ENABLE();
|
||||||
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* System interrupt init*/
|
||||||
|
/* PendSV_IRQn interrupt configuration */
|
||||||
|
HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
|
||||||
|
|
||||||
|
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
|
||||||
|
*/
|
||||||
|
__HAL_AFIO_REMAP_SWJ_NOJTAG();
|
||||||
|
|
||||||
|
/* USER CODE BEGIN MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END MspInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
@ -0,0 +1,138 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f1xx_hal_timebase_tim.c
|
||||||
|
* @brief HAL time base based on the hardware TIM.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f1xx_hal.h"
|
||||||
|
#include "stm32f1xx_hal_tim.h"
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
TIM_HandleTypeDef htim4;
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
void TIM4_IRQHandler(void);
|
||||||
|
/* Private functions ---------------------------------------------------------*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function configures the TIM4 as a time base source.
|
||||||
|
* The time source is configured to have 1ms time base with a dedicated
|
||||||
|
* Tick interrupt priority.
|
||||||
|
* @note This function is called automatically at the beginning of program after
|
||||||
|
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
|
||||||
|
* @param TickPriority: Tick interrupt priority.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||||||
|
{
|
||||||
|
RCC_ClkInitTypeDef clkconfig;
|
||||||
|
uint32_t uwTimclock, uwAPB1Prescaler = 0U;
|
||||||
|
|
||||||
|
uint32_t uwPrescalerValue = 0U;
|
||||||
|
uint32_t pFLatency;
|
||||||
|
HAL_StatusTypeDef status = HAL_OK;
|
||||||
|
|
||||||
|
/* Enable TIM4 clock */
|
||||||
|
__HAL_RCC_TIM4_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* Get clock configuration */
|
||||||
|
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
|
||||||
|
|
||||||
|
/* Get APB1 prescaler */
|
||||||
|
uwAPB1Prescaler = clkconfig.APB1CLKDivider;
|
||||||
|
/* Compute TIM4 clock */
|
||||||
|
if (uwAPB1Prescaler == RCC_HCLK_DIV1)
|
||||||
|
{
|
||||||
|
uwTimclock = HAL_RCC_GetPCLK1Freq();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Compute the prescaler value to have TIM4 counter clock equal to 1MHz */
|
||||||
|
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
|
||||||
|
|
||||||
|
/* Initialize TIM4 */
|
||||||
|
htim4.Instance = TIM4;
|
||||||
|
|
||||||
|
/* Initialize TIMx peripheral as follow:
|
||||||
|
|
||||||
|
+ Period = [(TIM4CLK/1000) - 1]. to have a (1/1000) s time base.
|
||||||
|
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
|
||||||
|
+ ClockDivision = 0
|
||||||
|
+ Counter direction = Up
|
||||||
|
*/
|
||||||
|
htim4.Init.Period = (1000000U / 1000U) - 1U;
|
||||||
|
htim4.Init.Prescaler = uwPrescalerValue;
|
||||||
|
htim4.Init.ClockDivision = 0;
|
||||||
|
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||||
|
|
||||||
|
status = HAL_TIM_Base_Init(&htim4);
|
||||||
|
if (status == HAL_OK)
|
||||||
|
{
|
||||||
|
/* Start the TIM time Base generation in interrupt mode */
|
||||||
|
status = HAL_TIM_Base_Start_IT(&htim4);
|
||||||
|
if (status == HAL_OK)
|
||||||
|
{
|
||||||
|
/* Enable the TIM4 global Interrupt */
|
||||||
|
HAL_NVIC_EnableIRQ(TIM4_IRQn);
|
||||||
|
/* Configure the SysTick IRQ priority */
|
||||||
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||||||
|
{
|
||||||
|
/* Configure the TIM IRQ priority */
|
||||||
|
HAL_NVIC_SetPriority(TIM4_IRQn, TickPriority, 0U);
|
||||||
|
uwTickPrio = TickPriority;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
status = HAL_ERROR;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Return function status */
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Suspend Tick increment.
|
||||||
|
* @note Disable the tick increment by disabling TIM4 update interrupt.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_SuspendTick(void)
|
||||||
|
{
|
||||||
|
/* Disable TIM4 update Interrupt */
|
||||||
|
__HAL_TIM_DISABLE_IT(&htim4, TIM_IT_UPDATE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resume Tick increment.
|
||||||
|
* @note Enable the tick increment by Enabling TIM4 update interrupt.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_ResumeTick(void)
|
||||||
|
{
|
||||||
|
/* Enable TIM4 Update interrupt */
|
||||||
|
__HAL_TIM_ENABLE_IT(&htim4, TIM_IT_UPDATE);
|
||||||
|
}
|
||||||
|
|
||||||
238
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/stm32f1xx_it.c
Normal file
238
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/stm32f1xx_it.c
Normal file
@ -0,0 +1,238 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f1xx_it.c
|
||||||
|
* @brief Interrupt Service Routines.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
#include "stm32f1xx_it.h"
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN TD */
|
||||||
|
|
||||||
|
/* USER CODE END TD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PD */
|
||||||
|
|
||||||
|
/* USER CODE END PD */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PM */
|
||||||
|
|
||||||
|
/* USER CODE END PM */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
|
/* USER CODE END PV */
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
|
/* USER CODE END PFP */
|
||||||
|
|
||||||
|
/* Private user code ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/* External variables --------------------------------------------------------*/
|
||||||
|
extern TIM_HandleTypeDef htim3;
|
||||||
|
extern DMA_HandleTypeDef hdma_usart1_tx;
|
||||||
|
extern DMA_HandleTypeDef hdma_usart1_rx;
|
||||||
|
extern UART_HandleTypeDef huart1;
|
||||||
|
extern TIM_HandleTypeDef htim4;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN EV */
|
||||||
|
|
||||||
|
/* USER CODE END EV */
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* Cortex-M3 Processor Interruption and Exception Handlers */
|
||||||
|
/******************************************************************************/
|
||||||
|
/**
|
||||||
|
* @brief This function handles Non maskable interrupt.
|
||||||
|
*/
|
||||||
|
void NMI_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||||
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Hard fault interrupt.
|
||||||
|
*/
|
||||||
|
void HardFault_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END HardFault_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||||
|
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Memory management fault.
|
||||||
|
*/
|
||||||
|
void MemManage_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||||
|
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Prefetch fault, memory access fault.
|
||||||
|
*/
|
||||||
|
void BusFault_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END BusFault_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||||
|
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Undefined instruction or illegal state.
|
||||||
|
*/
|
||||||
|
void UsageFault_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UsageFault_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||||
|
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Debug monitor.
|
||||||
|
*/
|
||||||
|
void DebugMon_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||||
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* STM32F1xx Peripheral Interrupt Handlers */
|
||||||
|
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||||
|
/* For the available peripheral interrupt handler names, */
|
||||||
|
/* please refer to the startup file (startup_stm32f1xx.s). */
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA1 channel4 global interrupt.
|
||||||
|
*/
|
||||||
|
void DMA1_Channel4_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Channel4_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_usart1_tx);
|
||||||
|
/* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Channel4_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA1 channel5 global interrupt.
|
||||||
|
*/
|
||||||
|
void DMA1_Channel5_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Channel5_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_usart1_rx);
|
||||||
|
/* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Channel5_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles TIM3 global interrupt.
|
||||||
|
*/
|
||||||
|
void TIM3_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM3_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM3_IRQn 0 */
|
||||||
|
HAL_TIM_IRQHandler(&htim3);
|
||||||
|
/* USER CODE BEGIN TIM3_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM3_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles TIM4 global interrupt.
|
||||||
|
*/
|
||||||
|
void TIM4_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM4_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM4_IRQn 0 */
|
||||||
|
HAL_TIM_IRQHandler(&htim4);
|
||||||
|
/* USER CODE BEGIN TIM4_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM4_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles USART1 global interrupt.
|
||||||
|
*/
|
||||||
|
void USART1_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART1_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_IRQn 0 */
|
||||||
|
HAL_UART_IRQHandler(&huart1);
|
||||||
|
/* USER CODE BEGIN USART1_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
176
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/syscalls.c
Normal file
176
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/syscalls.c
Normal file
@ -0,0 +1,176 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file syscalls.c
|
||||||
|
* @author Auto-generated by STM32CubeIDE
|
||||||
|
* @brief STM32CubeIDE Minimal System calls file
|
||||||
|
*
|
||||||
|
* For more information about which c-functions
|
||||||
|
* need which of these lowlevel functions
|
||||||
|
* please consult the Newlib libc-manual
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2020-2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes */
|
||||||
|
#include <sys/stat.h>
|
||||||
|
#include <stdlib.h>
|
||||||
|
#include <errno.h>
|
||||||
|
#include <stdio.h>
|
||||||
|
#include <signal.h>
|
||||||
|
#include <time.h>
|
||||||
|
#include <sys/time.h>
|
||||||
|
#include <sys/times.h>
|
||||||
|
|
||||||
|
|
||||||
|
/* Variables */
|
||||||
|
extern int __io_putchar(int ch) __attribute__((weak));
|
||||||
|
extern int __io_getchar(void) __attribute__((weak));
|
||||||
|
|
||||||
|
|
||||||
|
char *__env[1] = { 0 };
|
||||||
|
char **environ = __env;
|
||||||
|
|
||||||
|
|
||||||
|
/* Functions */
|
||||||
|
void initialise_monitor_handles()
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
int _getpid(void)
|
||||||
|
{
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _kill(int pid, int sig)
|
||||||
|
{
|
||||||
|
(void)pid;
|
||||||
|
(void)sig;
|
||||||
|
errno = EINVAL;
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
void _exit (int status)
|
||||||
|
{
|
||||||
|
_kill(status, -1);
|
||||||
|
while (1) {} /* Make sure we hang here */
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||||||
|
{
|
||||||
|
(void)file;
|
||||||
|
int DataIdx;
|
||||||
|
|
||||||
|
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||||
|
{
|
||||||
|
*ptr++ = __io_getchar();
|
||||||
|
}
|
||||||
|
|
||||||
|
return len;
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||||||
|
{
|
||||||
|
(void)file;
|
||||||
|
int DataIdx;
|
||||||
|
|
||||||
|
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||||
|
{
|
||||||
|
__io_putchar(*ptr++);
|
||||||
|
}
|
||||||
|
return len;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _close(int file)
|
||||||
|
{
|
||||||
|
(void)file;
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
int _fstat(int file, struct stat *st)
|
||||||
|
{
|
||||||
|
(void)file;
|
||||||
|
st->st_mode = S_IFCHR;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _isatty(int file)
|
||||||
|
{
|
||||||
|
(void)file;
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _lseek(int file, int ptr, int dir)
|
||||||
|
{
|
||||||
|
(void)file;
|
||||||
|
(void)ptr;
|
||||||
|
(void)dir;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _open(char *path, int flags, ...)
|
||||||
|
{
|
||||||
|
(void)path;
|
||||||
|
(void)flags;
|
||||||
|
/* Pretend like we always fail */
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _wait(int *status)
|
||||||
|
{
|
||||||
|
(void)status;
|
||||||
|
errno = ECHILD;
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _unlink(char *name)
|
||||||
|
{
|
||||||
|
(void)name;
|
||||||
|
errno = ENOENT;
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _times(struct tms *buf)
|
||||||
|
{
|
||||||
|
(void)buf;
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _stat(char *file, struct stat *st)
|
||||||
|
{
|
||||||
|
(void)file;
|
||||||
|
st->st_mode = S_IFCHR;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _link(char *old, char *new)
|
||||||
|
{
|
||||||
|
(void)old;
|
||||||
|
(void)new;
|
||||||
|
errno = EMLINK;
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _fork(void)
|
||||||
|
{
|
||||||
|
errno = EAGAIN;
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int _execve(char *name, char **argv, char **env)
|
||||||
|
{
|
||||||
|
(void)name;
|
||||||
|
(void)argv;
|
||||||
|
(void)env;
|
||||||
|
errno = ENOMEM;
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
79
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/sysmem.c
Normal file
79
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/sysmem.c
Normal file
@ -0,0 +1,79 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file sysmem.c
|
||||||
|
* @author Generated by STM32CubeIDE
|
||||||
|
* @brief STM32CubeIDE System Memory calls file
|
||||||
|
*
|
||||||
|
* For more information about which C functions
|
||||||
|
* need which of these lowlevel functions
|
||||||
|
* please consult the newlib libc manual
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes */
|
||||||
|
#include <errno.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Pointer to the current high watermark of the heap usage
|
||||||
|
*/
|
||||||
|
static uint8_t *__sbrk_heap_end = NULL;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
|
||||||
|
* and others from the C library
|
||||||
|
*
|
||||||
|
* @verbatim
|
||||||
|
* ############################################################################
|
||||||
|
* # .data # .bss # newlib heap # MSP stack #
|
||||||
|
* # # # # Reserved by _Min_Stack_Size #
|
||||||
|
* ############################################################################
|
||||||
|
* ^-- RAM start ^-- _end _estack, RAM end --^
|
||||||
|
* @endverbatim
|
||||||
|
*
|
||||||
|
* This implementation starts allocating at the '_end' linker symbol
|
||||||
|
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
|
||||||
|
* The implementation considers '_estack' linker symbol to be RAM end
|
||||||
|
* NOTE: If the MSP stack, at any point during execution, grows larger than the
|
||||||
|
* reserved size, please increase the '_Min_Stack_Size'.
|
||||||
|
*
|
||||||
|
* @param incr Memory size
|
||||||
|
* @return Pointer to allocated memory
|
||||||
|
*/
|
||||||
|
void *_sbrk(ptrdiff_t incr)
|
||||||
|
{
|
||||||
|
extern uint8_t _end; /* Symbol defined in the linker script */
|
||||||
|
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||||||
|
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||||||
|
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||||||
|
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||||
|
uint8_t *prev_heap_end;
|
||||||
|
|
||||||
|
/* Initialize heap end at first call */
|
||||||
|
if (NULL == __sbrk_heap_end)
|
||||||
|
{
|
||||||
|
__sbrk_heap_end = &_end;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Protect heap from growing into the reserved MSP stack */
|
||||||
|
if (__sbrk_heap_end + incr > max_heap)
|
||||||
|
{
|
||||||
|
errno = ENOMEM;
|
||||||
|
return (void *)-1;
|
||||||
|
}
|
||||||
|
|
||||||
|
prev_heap_end = __sbrk_heap_end;
|
||||||
|
__sbrk_heap_end += incr;
|
||||||
|
|
||||||
|
return (void *)prev_heap_end;
|
||||||
|
}
|
||||||
@ -0,0 +1,406 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f1xx.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
|
||||||
|
*
|
||||||
|
* 1. This file provides two functions and one global variable to be called from
|
||||||
|
* user application:
|
||||||
|
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
|
||||||
|
* factors, AHB/APBx prescalers and Flash settings).
|
||||||
|
* This function is called at startup just after reset and
|
||||||
|
* before branch to main program. This call is made inside
|
||||||
|
* the "startup_stm32f1xx_xx.s" file.
|
||||||
|
*
|
||||||
|
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||||
|
* by the user application to setup the SysTick
|
||||||
|
* timer or configure other parameters.
|
||||||
|
*
|
||||||
|
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||||
|
* be called whenever the core clock is changed
|
||||||
|
* during program execution.
|
||||||
|
*
|
||||||
|
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
|
||||||
|
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
|
||||||
|
* configure the system clock before to branch to main program.
|
||||||
|
*
|
||||||
|
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
|
||||||
|
* the product used), refer to "HSE_VALUE".
|
||||||
|
* When HSE is used as system clock source, directly or through PLL, and you
|
||||||
|
* are using different crystal you have to adapt the HSE value to your own
|
||||||
|
* configuration.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017-2021 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f1xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F1xx_System_Private_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "stm32f1xx.h"
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F1xx_System_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
|
||||||
|
This value can be provided and adapted by the user application. */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
|
||||||
|
This value can be provided and adapted by the user application. */
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/*!< Uncomment the following line if you need to use external SRAM */
|
||||||
|
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||||
|
/* #define DATA_IN_ExtSRAM */
|
||||||
|
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||||
|
|
||||||
|
/* Note: Following vector table addresses must be defined in line with linker
|
||||||
|
configuration. */
|
||||||
|
/*!< Uncomment the following line if you need to relocate the vector table
|
||||||
|
anywhere in Flash or Sram, else the vector table is kept at the automatic
|
||||||
|
remap of boot address selected */
|
||||||
|
/* #define USER_VECT_TAB_ADDRESS */
|
||||||
|
|
||||||
|
#if defined(USER_VECT_TAB_ADDRESS)
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||||
|
in Sram else user remap will be done in Flash. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#if defined(VECT_TAB_SRAM)
|
||||||
|
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
#else
|
||||||
|
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
#endif /* VECT_TAB_SRAM */
|
||||||
|
#endif /* USER_VECT_TAB_ADDRESS */
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F1xx_System_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F1xx_System_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* This variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
uint32_t SystemCoreClock = 16000000;
|
||||||
|
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||||
|
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||||
|
#ifdef DATA_IN_ExtSRAM
|
||||||
|
static void SystemInit_ExtMemCtl(void);
|
||||||
|
#endif /* DATA_IN_ExtSRAM */
|
||||||
|
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F1xx_System_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system
|
||||||
|
* Initialize the Embedded Flash Interface, the PLL and update the
|
||||||
|
* SystemCoreClock variable.
|
||||||
|
* @note This function should be used only after reset.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit (void)
|
||||||
|
{
|
||||||
|
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||||
|
#ifdef DATA_IN_ExtSRAM
|
||||||
|
SystemInit_ExtMemCtl();
|
||||||
|
#endif /* DATA_IN_ExtSRAM */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Configure the Vector Table location -------------------------------------*/
|
||||||
|
#if defined(USER_VECT_TAB_ADDRESS)
|
||||||
|
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||||||
|
#endif /* USER_VECT_TAB_ADDRESS */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||||
|
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||||
|
* be used by the user application to setup the SysTick timer or configure
|
||||||
|
* other parameters.
|
||||||
|
*
|
||||||
|
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||||
|
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||||
|
* based on this variable will be incorrect.
|
||||||
|
*
|
||||||
|
* @note - The system frequency computed by this function is not the real
|
||||||
|
* frequency in the chip. It is calculated based on the predefined
|
||||||
|
* constant and the selected clock source:
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
* or HSI_VALUE(*) multiplied by the PLL factors.
|
||||||
|
*
|
||||||
|
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
|
||||||
|
* 8 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
*
|
||||||
|
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
|
||||||
|
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
|
||||||
|
* that HSE_VALUE is same as the real frequency of the crystal used.
|
||||||
|
* Otherwise, this function may have wrong result.
|
||||||
|
*
|
||||||
|
* - The result of this function could be not correct when using fractional
|
||||||
|
* value for HSE crystal.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemCoreClockUpdate (void)
|
||||||
|
{
|
||||||
|
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
|
||||||
|
|
||||||
|
#if defined(STM32F105xC) || defined(STM32F107xC)
|
||||||
|
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
|
||||||
|
#endif /* STM32F105xC */
|
||||||
|
|
||||||
|
#if defined(STM32F100xB) || defined(STM32F100xE)
|
||||||
|
uint32_t prediv1factor = 0U;
|
||||||
|
#endif /* STM32F100xB or STM32F100xE */
|
||||||
|
|
||||||
|
/* Get SYSCLK source -------------------------------------------------------*/
|
||||||
|
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||||
|
|
||||||
|
switch (tmp)
|
||||||
|
{
|
||||||
|
case 0x00U: /* HSI used as system clock */
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
case 0x04U: /* HSE used as system clock */
|
||||||
|
SystemCoreClock = HSE_VALUE;
|
||||||
|
break;
|
||||||
|
case 0x08U: /* PLL used as system clock */
|
||||||
|
|
||||||
|
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||||
|
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
|
||||||
|
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||||
|
|
||||||
|
#if !defined(STM32F105xC) && !defined(STM32F107xC)
|
||||||
|
pllmull = ( pllmull >> 18U) + 2U;
|
||||||
|
|
||||||
|
if (pllsource == 0x00U)
|
||||||
|
{
|
||||||
|
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||||
|
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
#if defined(STM32F100xB) || defined(STM32F100xE)
|
||||||
|
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
|
||||||
|
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||||
|
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||||
|
#else
|
||||||
|
/* HSE selected as PLL clock entry */
|
||||||
|
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
|
||||||
|
{/* HSE oscillator clock divided by 2 */
|
||||||
|
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
SystemCoreClock = HSE_VALUE * pllmull;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
pllmull = pllmull >> 18U;
|
||||||
|
|
||||||
|
if (pllmull != 0x0DU)
|
||||||
|
{
|
||||||
|
pllmull += 2U;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{ /* PLL multiplication factor = PLL input clock * 6.5 */
|
||||||
|
pllmull = 13U / 2U;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (pllsource == 0x00U)
|
||||||
|
{
|
||||||
|
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||||
|
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{/* PREDIV1 selected as PLL clock entry */
|
||||||
|
|
||||||
|
/* Get PREDIV1 clock source and division factor */
|
||||||
|
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
|
||||||
|
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
|
||||||
|
|
||||||
|
if (prediv1source == 0U)
|
||||||
|
{
|
||||||
|
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||||
|
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{/* PLL2 clock selected as PREDIV1 clock entry */
|
||||||
|
|
||||||
|
/* Get PREDIV2 division factor and PLL2 multiplication factor */
|
||||||
|
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
|
||||||
|
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
|
||||||
|
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* STM32F105xC */
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Compute HCLK clock frequency ----------------*/
|
||||||
|
/* Get HCLK prescaler */
|
||||||
|
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
|
||||||
|
/* HCLK clock frequency */
|
||||||
|
SystemCoreClock >>= tmp;
|
||||||
|
}
|
||||||
|
|
||||||
|
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||||
|
/**
|
||||||
|
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
|
||||||
|
* before jump to __main
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#ifdef DATA_IN_ExtSRAM
|
||||||
|
/**
|
||||||
|
* @brief Setup the external memory controller.
|
||||||
|
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
|
||||||
|
* This function configures the external SRAM mounted on STM3210E-EVAL
|
||||||
|
* board (STM32 High density devices). This SRAM will be used as program
|
||||||
|
* data memory (including heap and stack).
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit_ExtMemCtl(void)
|
||||||
|
{
|
||||||
|
__IO uint32_t tmpreg;
|
||||||
|
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
|
||||||
|
required, then adjust the Register Addresses */
|
||||||
|
|
||||||
|
/* Enable FSMC clock */
|
||||||
|
RCC->AHBENR = 0x00000114U;
|
||||||
|
|
||||||
|
/* Delay after an RCC peripheral clock enabling */
|
||||||
|
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
|
||||||
|
|
||||||
|
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
|
||||||
|
RCC->APB2ENR = 0x000001E0U;
|
||||||
|
|
||||||
|
/* Delay after an RCC peripheral clock enabling */
|
||||||
|
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
|
||||||
|
|
||||||
|
(void)(tmpreg);
|
||||||
|
|
||||||
|
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
|
||||||
|
/*---------------- SRAM Address lines configuration -------------------------*/
|
||||||
|
/*---------------- NOE and NWE configuration --------------------------------*/
|
||||||
|
/*---------------- NE3 configuration ----------------------------------------*/
|
||||||
|
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
|
||||||
|
|
||||||
|
GPIOD->CRL = 0x44BB44BBU;
|
||||||
|
GPIOD->CRH = 0xBBBBBBBBU;
|
||||||
|
|
||||||
|
GPIOE->CRL = 0xB44444BBU;
|
||||||
|
GPIOE->CRH = 0xBBBBBBBBU;
|
||||||
|
|
||||||
|
GPIOF->CRL = 0x44BBBBBBU;
|
||||||
|
GPIOF->CRH = 0xBBBB4444U;
|
||||||
|
|
||||||
|
GPIOG->CRL = 0x44BBBBBBU;
|
||||||
|
GPIOG->CRH = 0x444B4B44U;
|
||||||
|
|
||||||
|
/*---------------- FSMC Configuration ---------------------------------------*/
|
||||||
|
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
|
||||||
|
|
||||||
|
FSMC_Bank1->BTCR[4U] = 0x00001091U;
|
||||||
|
FSMC_Bank1->BTCR[5U] = 0x00110212U;
|
||||||
|
}
|
||||||
|
#endif /* DATA_IN_ExtSRAM */
|
||||||
|
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
215
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/tim.c
Normal file
215
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/tim.c
Normal file
@ -0,0 +1,215 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file tim.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of the TIM instances.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "tim.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
TIM_HandleTypeDef htim2;
|
||||||
|
TIM_HandleTypeDef htim3;
|
||||||
|
|
||||||
|
/* TIM2 init function */
|
||||||
|
void MX_TIM2_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM2_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_Init 0 */
|
||||||
|
|
||||||
|
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||||
|
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||||
|
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM2_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_Init 1 */
|
||||||
|
htim2.Instance = TIM2;
|
||||||
|
htim2.Init.Prescaler = 0;
|
||||||
|
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
htim2.Init.Period = 999;
|
||||||
|
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||||
|
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||||
|
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||||
|
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||||
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||||
|
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||||
|
sConfigOC.Pulse = 900;
|
||||||
|
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||||
|
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||||
|
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN TIM2_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_Init 2 */
|
||||||
|
HAL_TIM_MspPostInit(&htim2);
|
||||||
|
|
||||||
|
}
|
||||||
|
/* TIM3 init function */
|
||||||
|
void MX_TIM3_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM3_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM3_Init 0 */
|
||||||
|
|
||||||
|
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||||
|
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM3_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM3_Init 1 */
|
||||||
|
htim3.Instance = TIM3;
|
||||||
|
htim3.Init.Prescaler = 3;
|
||||||
|
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
htim3.Init.Period = 39999;
|
||||||
|
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||||
|
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||||
|
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||||
|
if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||||
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||||
|
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN TIM3_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM3_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
if(tim_baseHandle->Instance==TIM2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspInit 0 */
|
||||||
|
/* TIM2 clock enable */
|
||||||
|
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||||
|
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspInit 1 */
|
||||||
|
}
|
||||||
|
else if(tim_baseHandle->Instance==TIM3)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM3_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM3_MspInit 0 */
|
||||||
|
/* TIM3 clock enable */
|
||||||
|
__HAL_RCC_TIM3_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* TIM3 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(TIM3_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(TIM3_IRQn);
|
||||||
|
/* USER CODE BEGIN TIM3_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM3_MspInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
if(timHandle->Instance==TIM2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM2_MspPostInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspPostInit 0 */
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
/**TIM2 GPIO Configuration
|
||||||
|
PB3 ------> TIM2_CH2
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
__HAL_AFIO_REMAP_TIM2_PARTIAL_1();
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM2_MspPostInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspPostInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
if(tim_baseHandle->Instance==TIM2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||||
|
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
else if(tim_baseHandle->Instance==TIM3)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM3_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM3_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_TIM3_CLK_DISABLE();
|
||||||
|
|
||||||
|
/* TIM3 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(TIM3_IRQn);
|
||||||
|
/* USER CODE BEGIN TIM3_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM3_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
495
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/usart.c
Normal file
495
1_iteration/firmware/ECG_D_0001_31102024/Core/Src/usart.c
Normal file
@ -0,0 +1,495 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file usart.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of the USART instances.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2024 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "usart.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
extern adc_struct adc_str;//структура ацп
|
||||||
|
#include "icd.h"
|
||||||
|
uint8_t TX_BUF[TX_PLOAD_WIDTH+1];
|
||||||
|
uint8_t MESH_BUF[MESH_PLOAD_WIDTH+1];
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
UART_HandleTypeDef huart1;
|
||||||
|
DMA_HandleTypeDef hdma_usart1_tx;
|
||||||
|
DMA_HandleTypeDef hdma_usart1_rx;
|
||||||
|
|
||||||
|
/* USART1 init function */
|
||||||
|
|
||||||
|
void MX_USART1_UART_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART1_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_Init 1 */
|
||||||
|
huart1.Instance = USART1;
|
||||||
|
huart1.Init.BaudRate = 115200;
|
||||||
|
huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
||||||
|
huart1.Init.StopBits = UART_STOPBITS_1;
|
||||||
|
huart1.Init.Parity = UART_PARITY_NONE;
|
||||||
|
huart1.Init.Mode = UART_MODE_TX_RX;
|
||||||
|
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
|
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
|
if (HAL_UART_Init(&huart1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN USART1_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
if(uartHandle->Instance==USART1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_MspInit 0 */
|
||||||
|
/* USART1 clock enable */
|
||||||
|
__HAL_RCC_USART1_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
/**USART1 GPIO Configuration
|
||||||
|
PB6 ------> USART1_TX
|
||||||
|
PB7 ------> USART1_RX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_7;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
__HAL_AFIO_REMAP_USART1_ENABLE();
|
||||||
|
|
||||||
|
/* USART1 DMA Init */
|
||||||
|
/* USART1_TX Init */
|
||||||
|
hdma_usart1_tx.Instance = DMA1_Channel4;
|
||||||
|
hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||||
|
hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||||
|
hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||||
|
hdma_usart1_tx.Init.Mode = DMA_NORMAL;
|
||||||
|
hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx);
|
||||||
|
|
||||||
|
/* USART1_RX Init */
|
||||||
|
hdma_usart1_rx.Instance = DMA1_Channel5;
|
||||||
|
hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||||
|
hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||||
|
hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||||
|
hdma_usart1_rx.Init.Mode = DMA_NORMAL;
|
||||||
|
hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart1_rx);
|
||||||
|
|
||||||
|
/* USART1 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(USART1_IRQn);
|
||||||
|
/* USER CODE BEGIN USART1_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_MspInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
if(uartHandle->Instance==USART1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_USART1_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**USART1 GPIO Configuration
|
||||||
|
PB6 ------> USART1_TX
|
||||||
|
PB7 ------> USART1_RX
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7);
|
||||||
|
|
||||||
|
/* USART1 DMA DeInit */
|
||||||
|
HAL_DMA_DeInit(uartHandle->hdmatx);
|
||||||
|
HAL_DMA_DeInit(uartHandle->hdmarx);
|
||||||
|
|
||||||
|
/* USART1 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(USART1_IRQn);
|
||||||
|
/* USER CODE BEGIN USART1_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
void print_usart(const char *pFormat, ...)
|
||||||
|
{
|
||||||
|
va_list ap;
|
||||||
|
static char tbuff[256];
|
||||||
|
static HAL_StatusTypeDef res;
|
||||||
|
// Forward call to vsprintf
|
||||||
|
va_start(ap, pFormat);
|
||||||
|
vsprintf(tbuff, pFormat, ap);
|
||||||
|
// HAL_UART_Transmit(&huart1, (unsigned char*)tbuff, strlen(tbuff), 10);
|
||||||
|
res = HAL_UART_Transmit_DMA(&huart1, (unsigned char*)tbuff, strlen(tbuff));
|
||||||
|
va_end(ap);
|
||||||
|
}
|
||||||
|
|
||||||
|
void ble_control(ctrl_struct* control)
|
||||||
|
{
|
||||||
|
if(control->ble_mode_now != control->ble_mode_set)
|
||||||
|
{
|
||||||
|
if(control->ble_mode_set == ble_off)
|
||||||
|
{
|
||||||
|
HAL_GPIO_WritePin(BLE_PWR_GPIO_Port, BLE_PWR_Pin, RESET);
|
||||||
|
control->ble_mode_now = ble_off;
|
||||||
|
}
|
||||||
|
if(control->ble_mode_set == ble_raw)
|
||||||
|
{
|
||||||
|
HAL_GPIO_WritePin(BLE_PWR_GPIO_Port, BLE_PWR_Pin, RESET);
|
||||||
|
HAL_GPIO_WritePin(BLE_PWRC_GPIO_Port, BLE_PWRC_Pin, RESET);
|
||||||
|
HAL_Delay(100);
|
||||||
|
control->ble_mode_now = ble_off;
|
||||||
|
HAL_GPIO_WritePin(BLE_PWR_GPIO_Port, BLE_PWR_Pin, SET);
|
||||||
|
HAL_Delay(2000);
|
||||||
|
print_usart("AT+ROLE0\r\n");//это режим мастер-слейв в нем устройство потребляет 1мА
|
||||||
|
HAL_Delay(100);
|
||||||
|
print_usart("AT+NAMEECG_RAW_%04x\r\n",control->serial_number);//set name
|
||||||
|
HAL_Delay(100);
|
||||||
|
print_usart("AT+TYPE1\r\n");//slave
|
||||||
|
HAL_Delay(100);
|
||||||
|
print_usart("AT+PIN%06d\r\n",control->password);//slave
|
||||||
|
HAL_Delay(100);
|
||||||
|
print_usart("AT+RESET\r\n");//подтверждение настроек
|
||||||
|
HAL_Delay(1000);
|
||||||
|
HAL_GPIO_WritePin(BLE_PWRC_GPIO_Port, BLE_PWRC_Pin, SET);
|
||||||
|
control->ble_mode_now = ble_raw;
|
||||||
|
}
|
||||||
|
if(control->ble_mode_set == ble_mesh)
|
||||||
|
{
|
||||||
|
HAL_GPIO_WritePin(BLE_PWR_GPIO_Port, BLE_PWR_Pin, RESET);
|
||||||
|
HAL_GPIO_WritePin(BLE_PWRC_GPIO_Port, BLE_PWRC_Pin, RESET);
|
||||||
|
HAL_Delay(100);
|
||||||
|
control->ble_mode_now = ble_off;
|
||||||
|
HAL_GPIO_WritePin(BLE_PWR_GPIO_Port, BLE_PWR_Pin, SET);
|
||||||
|
HAL_Delay(2000);
|
||||||
|
print_usart("AT+ROLE5\r\n");//в режиме MESH 4мА
|
||||||
|
HAL_Delay(100);
|
||||||
|
print_usart("AT+MADDR%04x\r\n",control->serial_number);//адрес в сети должен быть разным у всех устройств сети
|
||||||
|
HAL_Delay(100);
|
||||||
|
print_usart("AT+NETID%04x\r\n",control->mesh_netid);//номер сети должен быть одним у всех устройсв сети
|
||||||
|
HAL_Delay(100);
|
||||||
|
print_usart("AT+NAMEECG_MESH_%04x\r\n",control->serial_number);//set name
|
||||||
|
HAL_Delay(100);
|
||||||
|
print_usart("AT+RESET\r\n");//подтверждение настроек
|
||||||
|
HAL_Delay(1000);
|
||||||
|
HAL_GPIO_WritePin(BLE_PWRC_GPIO_Port, BLE_PWRC_Pin, SET);
|
||||||
|
control->ble_mode_now = ble_mesh;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
void ble_deinit(void)
|
||||||
|
{
|
||||||
|
HAL_GPIO_WritePin(BLE_PWR_GPIO_Port, BLE_PWR_Pin, RESET);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void ble_HEX(ctrl_struct* control, adc_struct* adc,bool send)
|
||||||
|
{
|
||||||
|
//HAL_GPIO_WritePin(GPIOA, LED_Pin, SET);
|
||||||
|
TX_BUF[0] = 0x55;//стартовый байт
|
||||||
|
//акселерометры и гироскоп можно в одно место пихать, только
|
||||||
|
//пакуем акселерометры
|
||||||
|
TX_BUF[13] = (adc->ecg_1_raw >> 8) & 0xFF;
|
||||||
|
TX_BUF[14] = (adc->ecg_1_raw & 0xFF);
|
||||||
|
|
||||||
|
TX_BUF[15] = (adc->ecg_2_raw >> 8) & 0xFF;
|
||||||
|
TX_BUF[16] = (adc->ecg_2_raw & 0xFF);
|
||||||
|
|
||||||
|
TX_BUF[17] = (adc->ecg_3_raw >> 8) & 0xFF;
|
||||||
|
TX_BUF[18] = (adc->ecg_3_raw & 0xFF);
|
||||||
|
|
||||||
|
// TX_BUF[28] = (control->rf_counter >> 16) & 0xFF;
|
||||||
|
// TX_BUF[29] = (control->rf_counter >> 8) & 0xFF;
|
||||||
|
// TX_BUF[30] = (control->rf_counter & 0xFF);
|
||||||
|
|
||||||
|
TX_BUF[31] = 0x77;//конечный байт
|
||||||
|
//HAL_GPIO_WritePin(GPIOA, LED_Pin, RESET);
|
||||||
|
//данные шлём не всегда.
|
||||||
|
if((control->ble_mode_set == ble_raw) && (control->ble_mode_now == ble_raw))
|
||||||
|
if(send) HAL_UART_Transmit_DMA(&huart1, TX_BUF, TX_PLOAD_WIDTH);//TX_PLOAD_WIDTH);//было до этого TX_PLOAD_WIDTH+1 но работало не очень
|
||||||
|
}
|
||||||
|
|
||||||
|
void float2Bytes(float float_variable,uint8_t bytes_temp[4])
|
||||||
|
{
|
||||||
|
memcpy(bytes_temp, (unsigned char*) (&float_variable), 4);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void ble_HEX_new(ctrl_struct* control, icd_str * icd_str, adc_struct* adc,bool send)
|
||||||
|
{
|
||||||
|
//HAL_GPIO_WritePin(GPIOA, LED_Pin, SET);
|
||||||
|
TX_BUF[0] = 0x55;//стартовый байт
|
||||||
|
|
||||||
|
static uint8_t bytes[4];
|
||||||
|
|
||||||
|
|
||||||
|
TX_BUF[1] = (icd_str->counter >> 24) & 0xFF;
|
||||||
|
TX_BUF[2] = (icd_str->counter >> 16) & 0xFF;
|
||||||
|
TX_BUF[3] = (icd_str->counter >> 8) & 0xFF;
|
||||||
|
TX_BUF[4] = (icd_str->counter & 0xFF);
|
||||||
|
|
||||||
|
float2Bytes(icd_str->ecg_rv_din_treshold,&bytes[0]);//fixme временно
|
||||||
|
|
||||||
|
TX_BUF[5] = bytes[0];
|
||||||
|
TX_BUF[6] = bytes[1];
|
||||||
|
TX_BUF[7] = bytes[2];
|
||||||
|
TX_BUF[8] = bytes[3];
|
||||||
|
|
||||||
|
float2Bytes(icd_str->ecg_rv_pos_sig,&bytes[0]);
|
||||||
|
|
||||||
|
TX_BUF[9] = bytes[0];
|
||||||
|
TX_BUF[10] = bytes[1];
|
||||||
|
TX_BUF[11] = bytes[2];
|
||||||
|
TX_BUF[12] = bytes[3];
|
||||||
|
|
||||||
|
if(icd_str->dc_cut)
|
||||||
|
float2Bytes((icd_str->ecg_rv_filt - icd_str->ecg_rv_mov_av),&bytes[0]);
|
||||||
|
else
|
||||||
|
float2Bytes((icd_str->ecg_rv_filt),&bytes[0]);
|
||||||
|
|
||||||
|
TX_BUF[13] = bytes[0];
|
||||||
|
TX_BUF[14] = bytes[1];
|
||||||
|
TX_BUF[15] = bytes[2];
|
||||||
|
TX_BUF[16] = bytes[3];
|
||||||
|
|
||||||
|
// TX_BUF[17] = ((icd_str->last_RR_poz_rel*5) >> 8) & 0xFF;
|
||||||
|
// TX_BUF[18] = ((icd_str->last_RR_poz_rel*5) & 0xFF);
|
||||||
|
// TX_BUF[17] = ((adc->hv_volt) >> 8) & 0xFF;
|
||||||
|
// TX_BUF[18] = ((adc->hv_volt) & 0xFF);
|
||||||
|
TX_BUF[17] = ((adc->bat_volt) >> 8) & 0xFF;
|
||||||
|
TX_BUF[18] = ((adc->bat_volt) & 0xFF);
|
||||||
|
|
||||||
|
TX_BUF[19] = (((uint8_t)icd_str->search_now_mode & 0x7)<<5)
|
||||||
|
| (((uint8_t)icd_str->sub_mode & 0x7)<<2)| (((uint8_t)icd_str->terapy_now & 0x3)<<0);
|
||||||
|
|
||||||
|
TX_BUF[20] = (((uint8_t)icd_str->filter_on & 0x1)<<7) |(((uint8_t)icd_str->work_set_mode & 0x3)<<5)|
|
||||||
|
(((uint8_t)icd_str->LV_on & 0x1)<<4) | (((uint8_t)icd_str->HV_on & 0x1)<<3)|
|
||||||
|
(((uint8_t)icd_str->rr_now & 0x1)<<2)| (((uint8_t)icd_str->last_QRS & 0x3)<<0);
|
||||||
|
// bool LV_on;// реально стимулируем низковольтно
|
||||||
|
// bool HV_on;// реально стимулируем высоковольтно
|
||||||
|
|
||||||
|
|
||||||
|
//2 байта запас
|
||||||
|
//счётчик до последнего события в мс
|
||||||
|
// TX_BUF[13] = ((icd_str->last_RR_poz_rel*5) >> 8) & 0xFF;
|
||||||
|
// TX_BUF[14] = ((icd_str->last_RR_poz_rel*5) & 0xFF);
|
||||||
|
// TX_BUF[13] = ((icd_str->now_energy) >> 8) & 0xFF;
|
||||||
|
// TX_BUF[14] = ((icd_str->now_energy) & 0xFF);
|
||||||
|
//значение последнего периода fixme по идее не имеет смысла
|
||||||
|
// TX_BUF[15] = ((icd_str->last_period*5) >> 8) & 0xFF;
|
||||||
|
// TX_BUF[16] = ((icd_str->last_period*5) & 0xFF);
|
||||||
|
// TX_BUF[15] = ((icd_str->now_energy) >> 8) & 0xFF;
|
||||||
|
// TX_BUF[16] = ((icd_str->now_energy) & 0xFF);
|
||||||
|
// TX_BUF[15] = 0;
|
||||||
|
// TX_BUF[16] = (((uint8_t)icd_str->sub_mode) & 0xFF);
|
||||||
|
|
||||||
|
|
||||||
|
//не будем выпендриваться займём 8последних байт
|
||||||
|
if(icd_str->counter % 10 == 0)
|
||||||
|
{
|
||||||
|
float2Bytes(icd_str->min_tres,&bytes[0]);
|
||||||
|
TX_BUF[23] = bytes[0];
|
||||||
|
TX_BUF[24] = bytes[1];
|
||||||
|
TX_BUF[25] = bytes[2];
|
||||||
|
TX_BUF[26] = bytes[3];
|
||||||
|
|
||||||
|
float2Bytes(icd_str->max_tres,&bytes[0]);//fixme временно
|
||||||
|
TX_BUF[27] = bytes[0];
|
||||||
|
TX_BUF[28] = bytes[1];
|
||||||
|
TX_BUF[29] = bytes[2];
|
||||||
|
TX_BUF[30] = bytes[3];
|
||||||
|
|
||||||
|
}
|
||||||
|
else if(icd_str->counter % 10 == 1)
|
||||||
|
{
|
||||||
|
float2Bytes(icd_str->square_coef,&bytes[0]);
|
||||||
|
TX_BUF[23] = bytes[0];
|
||||||
|
TX_BUF[24] = bytes[1];
|
||||||
|
TX_BUF[25] = bytes[2];
|
||||||
|
TX_BUF[26] = bytes[3];
|
||||||
|
|
||||||
|
float2Bytes(icd_str->triangle_coef,&bytes[0]);//fixme временно
|
||||||
|
TX_BUF[27] = bytes[0];
|
||||||
|
TX_BUF[28] = bytes[1];
|
||||||
|
TX_BUF[29] = bytes[2];
|
||||||
|
TX_BUF[30] = bytes[3];
|
||||||
|
}
|
||||||
|
else if(icd_str->counter % 10 == 2)
|
||||||
|
{
|
||||||
|
// время слепоты при включении
|
||||||
|
TX_BUF[23] = ((icd_str->start_up_time*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[24] = ((icd_str->start_up_time*5) & 0xFF);
|
||||||
|
// время поиска в базовом режиме с минимальным порогом
|
||||||
|
TX_BUF[25] = ((icd_str->base_time*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[26] = ((icd_str->base_time*5) & 0xFF);
|
||||||
|
// Время в мс которое алгоритм ищет максимум
|
||||||
|
TX_BUF[27] = ((icd_str->max_search_time*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[28] = ((icd_str->max_search_time*5) & 0xFF);
|
||||||
|
// Время в мс нахождения в режиме поиска квадратов
|
||||||
|
TX_BUF[29] = ((icd_str->square_time*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[30] = ((icd_str->square_time*5) & 0xFF);
|
||||||
|
}
|
||||||
|
else if(icd_str->counter % 10 == 3)
|
||||||
|
{
|
||||||
|
TX_BUF[24] = (((uint8_t)icd_str->dc_cut & 0x1)<<3)|
|
||||||
|
(((uint8_t)icd_str->sd_card & 0x1)<<2)| (((uint8_t)icd_str->active_ch & 0x3)<<0);
|
||||||
|
//сопротивление потенциометра
|
||||||
|
TX_BUF[25] = ((icd_str->spi_pot_set)) & 0xFF;
|
||||||
|
//напряжение в процентах
|
||||||
|
TX_BUF[26] = ((adc_str.bat_pers) & 0xFF);
|
||||||
|
//напряжение на АКБ
|
||||||
|
TX_BUF[27] = ((adc_str.bat_volt) >> 8) & 0xFF;
|
||||||
|
TX_BUF[28] = ((adc_str.bat_volt) & 0xFF);
|
||||||
|
//напряжение на конденсаторе
|
||||||
|
TX_BUF[29] = ((adc_str.hv_volt) >> 8) & 0xFF;
|
||||||
|
TX_BUF[30] = ((adc_str.hv_volt) & 0xFF);
|
||||||
|
}
|
||||||
|
else if(icd_str->counter % 10 == 4)
|
||||||
|
{
|
||||||
|
// время слепоты при включении
|
||||||
|
TX_BUF[23] = ((icd_str->lv_stop_time*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[24] = ((icd_str->lv_stop_time*5) & 0xFF);
|
||||||
|
// время на весь qrs
|
||||||
|
TX_BUF[25] = ((icd_str->max_time*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[26] = ((icd_str->max_time*5) & 0xFF);
|
||||||
|
// время между последним и предпоследним событием
|
||||||
|
TX_BUF[27] = ((icd_str->last_period*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[28] = ((icd_str->last_period*5) & 0xFF);
|
||||||
|
}
|
||||||
|
else if(icd_str->counter % 10 == 5)
|
||||||
|
{
|
||||||
|
//счётчик собственных сокращений сердца 24 бита
|
||||||
|
TX_BUF[23] = ((icd_str->Vs_cnt) >> 16) & 0xFF;
|
||||||
|
TX_BUF[24] = ((icd_str->Vs_cnt) >> 8) & 0xFF;
|
||||||
|
TX_BUF[25] = ((icd_str->Vs_cnt) & 0xFF);
|
||||||
|
//счётчик собственных сокращений которые в шуме(не детектируется
|
||||||
|
TX_BUF[26] = ((icd_str->Vn_cnt) >> 8) & 0xFF;
|
||||||
|
TX_BUF[27] = ((icd_str->Vn_cnt) & 0xFF);
|
||||||
|
//счётчик принудительных стимуляций сердца низким напряжением(низковольтная стимуляция)
|
||||||
|
TX_BUF[28] = ((icd_str->Vp_cnt) >> 16) & 0xFF;
|
||||||
|
TX_BUF[29] = ((icd_str->Vp_cnt) >> 8) & 0xFF;
|
||||||
|
TX_BUF[30] = ((icd_str->Vp_cnt) & 0xFF);
|
||||||
|
}
|
||||||
|
else if(icd_str->counter % 10 == 6)
|
||||||
|
{
|
||||||
|
//порог периода фибриляции если период меньше, чем это число это фибриляция
|
||||||
|
TX_BUF[23] = ((icd_str->fibr_tres*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[24] = ((icd_str->fibr_tres*5) & 0xFF);
|
||||||
|
//порог периода Тахикардии 2 если период меньше, чем это число это Тахикардия 2
|
||||||
|
TX_BUF[25] = ((icd_str->tachy_2_tres*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[26] = ((icd_str->tachy_2_tres*5) & 0xFF);
|
||||||
|
//порог периода Тахикардии 1 если период меньше, чем это число это Тахикардия 1
|
||||||
|
TX_BUF[27] = ((icd_str->tachy_1_tres*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[28] = ((icd_str->tachy_1_tres*5) & 0xFF);
|
||||||
|
//сбрасываемый счётчик Vs событи
|
||||||
|
TX_BUF[29] = ((icd_str->vs_cnt_last) >> 8) & 0xFF;
|
||||||
|
TX_BUF[30] = ((icd_str->vs_cnt_last) & 0xFF);
|
||||||
|
}
|
||||||
|
else if(icd_str->counter % 10 == 7)
|
||||||
|
{
|
||||||
|
//фильтрованный скользящим средним период
|
||||||
|
TX_BUF[23] = ((icd_str->filt_period*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[24] = ((icd_str->filt_period*5) & 0xFF);
|
||||||
|
//счётчик фибриляции при обнаружении короткого RR он растёт
|
||||||
|
TX_BUF[25] = ((icd_str->fibr_cnt) & 0xFF);
|
||||||
|
//счётчик Тахикардии 2 при обнаружении короткого RR он растёт
|
||||||
|
TX_BUF[26] = ((icd_str->tachy_2_cnt) & 0xFF);
|
||||||
|
//счётчик Тахикардии 1 при обнаружении короткого RR он растёт
|
||||||
|
TX_BUF[27] = ((icd_str->tachy_1_cnt) & 0xFF);
|
||||||
|
//счётчик нормальных событий при достижении 5 сбрасываем все корзины
|
||||||
|
TX_BUF[28] = ((icd_str->norm_cnt) & 0xFF);
|
||||||
|
//порог счётчика фибриляций при котором начинаем терапию
|
||||||
|
TX_BUF[29] = ((icd_str->fibr_max_tres) & 0xFF);
|
||||||
|
}
|
||||||
|
else if(icd_str->counter % 10 == 8)
|
||||||
|
{
|
||||||
|
//фильтрованный скользящим средним период
|
||||||
|
TX_BUF[23] = (((uint8_t)icd_str->hv_step_number & 0xF)<<4)|(((uint8_t)icd_str->hv_step_cnt & 0xF)<<0);
|
||||||
|
//сколько джоулей в одном шаге считаем в зависимости от минимума и максимума.
|
||||||
|
TX_BUF[24] = ((icd_str->hv_step_energy) >> 8) & 0xFF;
|
||||||
|
TX_BUF[25] = ((icd_str->hv_step_energy) & 0xFF);
|
||||||
|
//так как всегда мало потратим 1 байт
|
||||||
|
TX_BUF[26] = (icd_str->min_energy) & 0xFF;
|
||||||
|
//текущая энергия конденсатора
|
||||||
|
TX_BUF[27] = ((icd_str->now_energy) >> 8) & 0xFF;
|
||||||
|
TX_BUF[28] = ((icd_str->now_energy) & 0xFF);
|
||||||
|
//максимальная энергия конденсатора
|
||||||
|
TX_BUF[29] = ((icd_str->max_energy) >> 8) & 0xFF;
|
||||||
|
TX_BUF[30] = ((icd_str->max_energy) & 0xFF);
|
||||||
|
}
|
||||||
|
else if(icd_str->counter % 10 == 9)
|
||||||
|
{
|
||||||
|
//время которое мы слепы после HV разряда
|
||||||
|
TX_BUF[23] = ((icd_str->hv_blind_time*5) >> 8) & 0xFF;
|
||||||
|
TX_BUF[24] = ((icd_str->hv_blind_time*5) & 0xFF);
|
||||||
|
//какой длинны мы заполныем буффер при редетекции//сколько нам нужно плохих событий для запуска терапии
|
||||||
|
TX_BUF[25] = (((uint8_t)icd_str->redet_num & 0xF)<<4)|((uint8_t)icd_str->redet_bad & 0xF);
|
||||||
|
//сколько всего событий в редетекции//сколько реально плохих событий
|
||||||
|
TX_BUF[26] = (((uint8_t)icd_str->redet_cnt & 0xF)<<4)|(((uint8_t)icd_str->redet_bad_cnt & 0xF)<<0);
|
||||||
|
//время которое мы ничего не делаем если терапия не сработала
|
||||||
|
TX_BUF[27] = ((icd_str->standby_timer) >> 24) & 0xFF;
|
||||||
|
TX_BUF[28] = ((icd_str->standby_timer) >> 16) & 0xFF;
|
||||||
|
TX_BUF[29] = ((icd_str->standby_timer) >> 8) & 0xFF;
|
||||||
|
TX_BUF[30] = ((icd_str->standby_timer) & 0xFF);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
TX_BUF[31] = 0x77;//конечный байт
|
||||||
|
//HAL_GPIO_WritePin(GPIOA, LED_Pin, RESET);
|
||||||
|
//данные шлём не всегда.
|
||||||
|
if((control->ble_mode_set == ble_raw) && (control->ble_mode_now == ble_raw))
|
||||||
|
if(send) HAL_UART_Transmit_DMA(&huart1, TX_BUF, TX_PLOAD_WIDTH);//TX_PLOAD_WIDTH);//было до этого TX_PLOAD_WIDTH+1 но работало не очень
|
||||||
|
}
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
@ -0,0 +1,42 @@
|
|||||||
|
/*
|
||||||
|
* usart_ring.c
|
||||||
|
*
|
||||||
|
* Created on: 19 авг. 2019 г.
|
||||||
|
* Author: dima
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "usart_ring.h"
|
||||||
|
|
||||||
|
extern UART_HandleTypeDef MYUART;
|
||||||
|
|
||||||
|
/////////////////// USART /////////////////////
|
||||||
|
volatile uint16_t rx_buffer_head = 0;
|
||||||
|
volatile uint16_t rx_buffer_tail = 0;
|
||||||
|
uint8_t rx_buffer[UART_RX_BUFFER_SIZE] = {0,};
|
||||||
|
|
||||||
|
void clear_uart_buff()
|
||||||
|
{
|
||||||
|
__HAL_UART_DISABLE_IT(&MYUART, UART_IT_RXNE);
|
||||||
|
rx_buffer_head = 0;
|
||||||
|
rx_buffer_tail = 0;
|
||||||
|
__HAL_UART_ENABLE_IT(&MYUART, UART_IT_RXNE);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t uart_available(void)
|
||||||
|
{
|
||||||
|
return ((uint16_t)(UART_RX_BUFFER_SIZE + rx_buffer_head - rx_buffer_tail)) % UART_RX_BUFFER_SIZE;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t uart_read(void)
|
||||||
|
{
|
||||||
|
if(rx_buffer_head == rx_buffer_tail)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
uint8_t c = rx_buffer[rx_buffer_tail];
|
||||||
|
rx_buffer_tail = (uint16_t)(rx_buffer_tail + 1) % UART_RX_BUFFER_SIZE;
|
||||||
|
return c;
|
||||||
|
}
|
||||||
|
}
|
||||||
@ -0,0 +1,364 @@
|
|||||||
|
/**
|
||||||
|
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
|
||||||
|
* @file startup_stm32f103xb.s
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief STM32F103xB Devices vector table for Atollic toolchain.
|
||||||
|
* This module performs:
|
||||||
|
* - Set the initial SP
|
||||||
|
* - Set the initial PC == Reset_Handler,
|
||||||
|
* - Set the vector table entries with the exceptions ISR address
|
||||||
|
* - Configure the clock system
|
||||||
|
* - Branches to main in the C library (which eventually
|
||||||
|
* calls main()).
|
||||||
|
* After Reset the Cortex-M3 processor is in Thread mode,
|
||||||
|
* priority is Privileged, and the Stack is set to Main.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017-2021 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
.syntax unified
|
||||||
|
.cpu cortex-m3
|
||||||
|
.fpu softvfp
|
||||||
|
.thumb
|
||||||
|
|
||||||
|
.global g_pfnVectors
|
||||||
|
.global Default_Handler
|
||||||
|
|
||||||
|
/* start address for the initialization values of the .data section.
|
||||||
|
defined in linker script */
|
||||||
|
.word _sidata
|
||||||
|
/* start address for the .data section. defined in linker script */
|
||||||
|
.word _sdata
|
||||||
|
/* end address for the .data section. defined in linker script */
|
||||||
|
.word _edata
|
||||||
|
/* start address for the .bss section. defined in linker script */
|
||||||
|
.word _sbss
|
||||||
|
/* end address for the .bss section. defined in linker script */
|
||||||
|
.word _ebss
|
||||||
|
|
||||||
|
.equ BootRAM, 0xF108F85F
|
||||||
|
/**
|
||||||
|
* @brief This is the code that gets called when the processor first
|
||||||
|
* starts execution following a reset event. Only the absolutely
|
||||||
|
* necessary set is performed, after which the application
|
||||||
|
* supplied main() routine is called.
|
||||||
|
* @param None
|
||||||
|
* @retval : None
|
||||||
|
*/
|
||||||
|
|
||||||
|
.section .text.Reset_Handler
|
||||||
|
.weak Reset_Handler
|
||||||
|
.type Reset_Handler, %function
|
||||||
|
Reset_Handler:
|
||||||
|
|
||||||
|
/* Call the clock system initialization function.*/
|
||||||
|
bl SystemInit
|
||||||
|
|
||||||
|
/* Copy the data segment initializers from flash to SRAM */
|
||||||
|
ldr r0, =_sdata
|
||||||
|
ldr r1, =_edata
|
||||||
|
ldr r2, =_sidata
|
||||||
|
movs r3, #0
|
||||||
|
b LoopCopyDataInit
|
||||||
|
|
||||||
|
CopyDataInit:
|
||||||
|
ldr r4, [r2, r3]
|
||||||
|
str r4, [r0, r3]
|
||||||
|
adds r3, r3, #4
|
||||||
|
|
||||||
|
LoopCopyDataInit:
|
||||||
|
adds r4, r0, r3
|
||||||
|
cmp r4, r1
|
||||||
|
bcc CopyDataInit
|
||||||
|
|
||||||
|
/* Zero fill the bss segment. */
|
||||||
|
ldr r2, =_sbss
|
||||||
|
ldr r4, =_ebss
|
||||||
|
movs r3, #0
|
||||||
|
b LoopFillZerobss
|
||||||
|
|
||||||
|
FillZerobss:
|
||||||
|
str r3, [r2]
|
||||||
|
adds r2, r2, #4
|
||||||
|
|
||||||
|
LoopFillZerobss:
|
||||||
|
cmp r2, r4
|
||||||
|
bcc FillZerobss
|
||||||
|
|
||||||
|
/* Call static constructors */
|
||||||
|
bl __libc_init_array
|
||||||
|
/* Call the application's entry point.*/
|
||||||
|
bl main
|
||||||
|
bx lr
|
||||||
|
.size Reset_Handler, .-Reset_Handler
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This is the code that gets called when the processor receives an
|
||||||
|
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||||
|
* the system state for examination by a debugger.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval : None
|
||||||
|
*/
|
||||||
|
.section .text.Default_Handler,"ax",%progbits
|
||||||
|
Default_Handler:
|
||||||
|
Infinite_Loop:
|
||||||
|
b Infinite_Loop
|
||||||
|
.size Default_Handler, .-Default_Handler
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||||
|
* must be placed on this to ensure that it ends up at physical address
|
||||||
|
* 0x0000.0000.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
.section .isr_vector,"a",%progbits
|
||||||
|
.type g_pfnVectors, %object
|
||||||
|
.size g_pfnVectors, .-g_pfnVectors
|
||||||
|
|
||||||
|
|
||||||
|
g_pfnVectors:
|
||||||
|
|
||||||
|
.word _estack
|
||||||
|
.word Reset_Handler
|
||||||
|
.word NMI_Handler
|
||||||
|
.word HardFault_Handler
|
||||||
|
.word MemManage_Handler
|
||||||
|
.word BusFault_Handler
|
||||||
|
.word UsageFault_Handler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word SVC_Handler
|
||||||
|
.word DebugMon_Handler
|
||||||
|
.word 0
|
||||||
|
.word PendSV_Handler
|
||||||
|
.word SysTick_Handler
|
||||||
|
.word WWDG_IRQHandler
|
||||||
|
.word PVD_IRQHandler
|
||||||
|
.word TAMPER_IRQHandler
|
||||||
|
.word RTC_IRQHandler
|
||||||
|
.word FLASH_IRQHandler
|
||||||
|
.word RCC_IRQHandler
|
||||||
|
.word EXTI0_IRQHandler
|
||||||
|
.word EXTI1_IRQHandler
|
||||||
|
.word EXTI2_IRQHandler
|
||||||
|
.word EXTI3_IRQHandler
|
||||||
|
.word EXTI4_IRQHandler
|
||||||
|
.word DMA1_Channel1_IRQHandler
|
||||||
|
.word DMA1_Channel2_IRQHandler
|
||||||
|
.word DMA1_Channel3_IRQHandler
|
||||||
|
.word DMA1_Channel4_IRQHandler
|
||||||
|
.word DMA1_Channel5_IRQHandler
|
||||||
|
.word DMA1_Channel6_IRQHandler
|
||||||
|
.word DMA1_Channel7_IRQHandler
|
||||||
|
.word ADC1_2_IRQHandler
|
||||||
|
.word USB_HP_CAN1_TX_IRQHandler
|
||||||
|
.word USB_LP_CAN1_RX0_IRQHandler
|
||||||
|
.word CAN1_RX1_IRQHandler
|
||||||
|
.word CAN1_SCE_IRQHandler
|
||||||
|
.word EXTI9_5_IRQHandler
|
||||||
|
.word TIM1_BRK_IRQHandler
|
||||||
|
.word TIM1_UP_IRQHandler
|
||||||
|
.word TIM1_TRG_COM_IRQHandler
|
||||||
|
.word TIM1_CC_IRQHandler
|
||||||
|
.word TIM2_IRQHandler
|
||||||
|
.word TIM3_IRQHandler
|
||||||
|
.word TIM4_IRQHandler
|
||||||
|
.word I2C1_EV_IRQHandler
|
||||||
|
.word I2C1_ER_IRQHandler
|
||||||
|
.word I2C2_EV_IRQHandler
|
||||||
|
.word I2C2_ER_IRQHandler
|
||||||
|
.word SPI1_IRQHandler
|
||||||
|
.word SPI2_IRQHandler
|
||||||
|
.word USART1_IRQHandler
|
||||||
|
.word USART2_IRQHandler
|
||||||
|
.word USART3_IRQHandler
|
||||||
|
.word EXTI15_10_IRQHandler
|
||||||
|
.word RTC_Alarm_IRQHandler
|
||||||
|
.word USBWakeUp_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||||
|
STM32F10x Medium Density devices. */
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
*
|
||||||
|
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||||
|
* As they are weak aliases, any function with the same name will override
|
||||||
|
* this definition.
|
||||||
|
*
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
.weak NMI_Handler
|
||||||
|
.thumb_set NMI_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak HardFault_Handler
|
||||||
|
.thumb_set HardFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak MemManage_Handler
|
||||||
|
.thumb_set MemManage_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak BusFault_Handler
|
||||||
|
.thumb_set BusFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak UsageFault_Handler
|
||||||
|
.thumb_set UsageFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SVC_Handler
|
||||||
|
.thumb_set SVC_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak DebugMon_Handler
|
||||||
|
.thumb_set DebugMon_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak PendSV_Handler
|
||||||
|
.thumb_set PendSV_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SysTick_Handler
|
||||||
|
.thumb_set SysTick_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak WWDG_IRQHandler
|
||||||
|
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak PVD_IRQHandler
|
||||||
|
.thumb_set PVD_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TAMPER_IRQHandler
|
||||||
|
.thumb_set TAMPER_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RTC_IRQHandler
|
||||||
|
.thumb_set RTC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak FLASH_IRQHandler
|
||||||
|
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RCC_IRQHandler
|
||||||
|
.thumb_set RCC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI0_IRQHandler
|
||||||
|
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI1_IRQHandler
|
||||||
|
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI2_IRQHandler
|
||||||
|
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI3_IRQHandler
|
||||||
|
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI4_IRQHandler
|
||||||
|
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel1_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel2_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel3_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel4_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel5_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel6_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel7_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak ADC1_2_IRQHandler
|
||||||
|
.thumb_set ADC1_2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USB_HP_CAN1_TX_IRQHandler
|
||||||
|
.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USB_LP_CAN1_RX0_IRQHandler
|
||||||
|
.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak CAN1_RX1_IRQHandler
|
||||||
|
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak CAN1_SCE_IRQHandler
|
||||||
|
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI9_5_IRQHandler
|
||||||
|
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_BRK_IRQHandler
|
||||||
|
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_UP_IRQHandler
|
||||||
|
.thumb_set TIM1_UP_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_TRG_COM_IRQHandler
|
||||||
|
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_CC_IRQHandler
|
||||||
|
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM2_IRQHandler
|
||||||
|
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM3_IRQHandler
|
||||||
|
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM4_IRQHandler
|
||||||
|
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C1_EV_IRQHandler
|
||||||
|
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C1_ER_IRQHandler
|
||||||
|
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C2_EV_IRQHandler
|
||||||
|
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C2_ER_IRQHandler
|
||||||
|
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI1_IRQHandler
|
||||||
|
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI2_IRQHandler
|
||||||
|
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART1_IRQHandler
|
||||||
|
.thumb_set USART1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART2_IRQHandler
|
||||||
|
.thumb_set USART2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART3_IRQHandler
|
||||||
|
.thumb_set USART3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI15_10_IRQHandler
|
||||||
|
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RTC_Alarm_IRQHandler
|
||||||
|
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USBWakeUp_IRQHandler
|
||||||
|
.thumb_set USBWakeUp_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,4 @@
|
|||||||
|
../Core/Src/adc.c:30:6:MX_ADC1_Init 5
|
||||||
|
../Core/Src/adc.c:91:6:HAL_ADC_MspInit 2
|
||||||
|
../Core/Src/adc.c:119:6:HAL_ADC_MspDeInit 2
|
||||||
|
../Core/Src/adc.c:144:6:adc_read 1
|
||||||
@ -0,0 +1,57 @@
|
|||||||
|
Core/Src/adc.o: ../Core/Src/adc.c ../Core/Inc/adc.h ../Core/Inc/main.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
|
||||||
|
../Core/Inc/adc.h:
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/adc.o
Normal file
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/adc.o
Normal file
Binary file not shown.
@ -0,0 +1,4 @@
|
|||||||
|
../Core/Src/adc.c:30:6:MX_ADC1_Init 24 static
|
||||||
|
../Core/Src/adc.c:91:6:HAL_ADC_MspInit 40 static
|
||||||
|
../Core/Src/adc.c:119:6:HAL_ADC_MspDeInit 16 static
|
||||||
|
../Core/Src/adc.c:144:6:adc_read 16 static
|
||||||
@ -0,0 +1,3 @@
|
|||||||
|
../Core/Src/control.c:9:6:control_init 1
|
||||||
|
../Core/Src/control.c:22:6:control_init_var 1
|
||||||
|
../Core/Src/control.c:36:6:lets_sleep 1
|
||||||
@ -0,0 +1,60 @@
|
|||||||
|
Core/Src/control.o: ../Core/Src/control.c ../Core/Inc/control.h \
|
||||||
|
../Core/Inc/main.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \
|
||||||
|
../Core/Inc/adc.h ../Core/Inc/gpio.h
|
||||||
|
../Core/Inc/control.h:
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
|
../Core/Inc/adc.h:
|
||||||
|
../Core/Inc/gpio.h:
|
||||||
Binary file not shown.
@ -0,0 +1,3 @@
|
|||||||
|
../Core/Src/control.c:9:6:control_init 4 static
|
||||||
|
../Core/Src/control.c:22:6:control_init_var 16 static
|
||||||
|
../Core/Src/control.c:36:6:lets_sleep 4 static
|
||||||
@ -0,0 +1 @@
|
|||||||
|
../Core/Src/dma.c:39:6:MX_DMA_Init 1
|
||||||
@ -0,0 +1,57 @@
|
|||||||
|
Core/Src/dma.o: ../Core/Src/dma.c ../Core/Inc/dma.h ../Core/Inc/main.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
|
||||||
|
../Core/Inc/dma.h:
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/dma.o
Normal file
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/dma.o
Normal file
Binary file not shown.
@ -0,0 +1 @@
|
|||||||
|
../Core/Src/dma.c:39:6:MX_DMA_Init 16 static
|
||||||
@ -0,0 +1,5 @@
|
|||||||
|
../Core/Src/filter.c:5:7:iir_50hz_2or 3
|
||||||
|
../Core/Src/filter.c:43:7:iir_50hz_1or 3
|
||||||
|
../Core/Src/filter.c:76:7:iir_hp 3
|
||||||
|
../Core/Src/filter.c:106:7:iir_4060 3
|
||||||
|
../Core/Src/filter.c:143:7:iir_lp30 3
|
||||||
@ -0,0 +1,2 @@
|
|||||||
|
Core/Src/filter.o: ../Core/Src/filter.c ../Core/Inc/filter.h
|
||||||
|
../Core/Inc/filter.h:
|
||||||
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/filter.o
Normal file
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/filter.o
Normal file
Binary file not shown.
@ -0,0 +1,5 @@
|
|||||||
|
../Core/Src/filter.c:5:7:iir_50hz_2or 72 static
|
||||||
|
../Core/Src/filter.c:43:7:iir_50hz_1or 56 static
|
||||||
|
../Core/Src/filter.c:76:7:iir_hp 48 static
|
||||||
|
../Core/Src/filter.c:106:7:iir_4060 72 static
|
||||||
|
../Core/Src/filter.c:143:7:iir_lp30 72 static
|
||||||
@ -0,0 +1,7 @@
|
|||||||
|
../Core/Src/freertos.c:89:6:vApplicationGetIdleTaskMemory 1
|
||||||
|
../Core/Src/freertos.c:103:6:MX_FREERTOS_Init 1
|
||||||
|
../Core/Src/freertos.c:156:6:StartDefaultTask 1
|
||||||
|
../Core/Src/freertos.c:174:6:StartOprosTask 5
|
||||||
|
../Core/Src/freertos.c:206:6:StartControlTask 1
|
||||||
|
../Core/Src/freertos.c:225:6:StartLowSpeedTask 2
|
||||||
|
../Core/Src/freertos.c:246:6:HAL_UART_RxCpltCallback 1
|
||||||
@ -0,0 +1,104 @@
|
|||||||
|
Core/Src/freertos.o: ../Core/Src/freertos.c \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
|
||||||
|
../Core/Inc/FreeRTOSConfig.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
|
||||||
|
../Core/Inc/main.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
|
||||||
|
../Core/Inc/adc.h ../Core/Inc/main.h ../Core/Inc/usart.h \
|
||||||
|
../Core/Inc/control.h ../Core/Inc/adc.h ../Core/Inc/gpio.h \
|
||||||
|
../Core/Inc/icd.h ../Core/Inc/control.h ../Core/Inc/icd.h \
|
||||||
|
../Core/Inc/parse.h
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
|
||||||
|
../Core/Inc/FreeRTOSConfig.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
|
||||||
|
../Core/Inc/adc.h:
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Core/Inc/usart.h:
|
||||||
|
../Core/Inc/control.h:
|
||||||
|
../Core/Inc/adc.h:
|
||||||
|
../Core/Inc/gpio.h:
|
||||||
|
../Core/Inc/icd.h:
|
||||||
|
../Core/Inc/control.h:
|
||||||
|
../Core/Inc/icd.h:
|
||||||
|
../Core/Inc/parse.h:
|
||||||
Binary file not shown.
@ -0,0 +1,7 @@
|
|||||||
|
../Core/Src/freertos.c:89:6:vApplicationGetIdleTaskMemory 24 static
|
||||||
|
../Core/Src/freertos.c:103:6:MX_FREERTOS_Init 128 static
|
||||||
|
../Core/Src/freertos.c:156:6:StartDefaultTask 16 static
|
||||||
|
../Core/Src/freertos.c:174:6:StartOprosTask 16 static
|
||||||
|
../Core/Src/freertos.c:206:6:StartControlTask 16 static
|
||||||
|
../Core/Src/freertos.c:225:6:StartLowSpeedTask 24 static
|
||||||
|
../Core/Src/freertos.c:246:6:HAL_UART_RxCpltCallback 16 static
|
||||||
@ -0,0 +1 @@
|
|||||||
|
../Core/Src/gpio.c:43:6:MX_GPIO_Init 1
|
||||||
@ -0,0 +1,57 @@
|
|||||||
|
Core/Src/gpio.o: ../Core/Src/gpio.c ../Core/Inc/gpio.h ../Core/Inc/main.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
|
||||||
|
../Core/Inc/gpio.h:
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/gpio.o
Normal file
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/gpio.o
Normal file
Binary file not shown.
@ -0,0 +1 @@
|
|||||||
|
../Core/Src/gpio.c:43:6:MX_GPIO_Init 40 static
|
||||||
@ -0,0 +1,19 @@
|
|||||||
|
../Core/Src/icd.c:11:6:init_icd 1
|
||||||
|
../Core/Src/icd.c:115:7:my_abs 2
|
||||||
|
../Core/Src/icd.c:121:6:mode_start 2
|
||||||
|
../Core/Src/icd.c:133:6:get_data 2
|
||||||
|
../Core/Src/icd.c:147:6:get_data_max30003 1
|
||||||
|
../Core/Src/icd.c:158:6:check_mode_len 4
|
||||||
|
../Core/Src/icd.c:188:6:check_tres 9
|
||||||
|
../Core/Src/icd.c:237:6:search_alg 24
|
||||||
|
../Core/Src/icd.c:384:10:moving_avarage 3
|
||||||
|
../Core/Src/icd.c:403:6:basket_alg 8
|
||||||
|
../Core/Src/icd.c:444:6:terapy_start 2
|
||||||
|
../Core/Src/icd.c:454:6:hv_pwm 2
|
||||||
|
../Core/Src/icd.c:475:6:ll_shock 2
|
||||||
|
../Core/Src/icd.c:497:6:hv_charge 2
|
||||||
|
../Core/Src/icd.c:556:6:hv_discharge 1
|
||||||
|
../Core/Src/icd.c:567:6:hv_shock 2
|
||||||
|
../Core/Src/icd.c:595:6:quick_anal 4
|
||||||
|
../Core/Src/icd.c:635:6:fibr_terapy 6
|
||||||
|
../Core/Src/icd.c:703:6:terapy_algorithm 7
|
||||||
@ -0,0 +1,97 @@
|
|||||||
|
Core/Src/icd.o: ../Core/Src/icd.c ../Core/Inc/icd.h ../Core/Inc/main.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
|
||||||
|
../Core/Inc/FreeRTOSConfig.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
|
||||||
|
../Core/Inc/adc.h ../Core/Inc/filter.h ../Core/Inc/parse.h \
|
||||||
|
../Core/Inc/icd.h
|
||||||
|
../Core/Inc/icd.h:
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
|
||||||
|
../Core/Inc/FreeRTOSConfig.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
|
||||||
|
../Core/Inc/adc.h:
|
||||||
|
../Core/Inc/filter.h:
|
||||||
|
../Core/Inc/parse.h:
|
||||||
|
../Core/Inc/icd.h:
|
||||||
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/icd.o
Normal file
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/icd.o
Normal file
Binary file not shown.
@ -0,0 +1,19 @@
|
|||||||
|
../Core/Src/icd.c:11:6:init_icd 16 static
|
||||||
|
../Core/Src/icd.c:115:7:my_abs 16 static
|
||||||
|
../Core/Src/icd.c:121:6:mode_start 16 static
|
||||||
|
../Core/Src/icd.c:133:6:get_data 32 static
|
||||||
|
../Core/Src/icd.c:147:6:get_data_max30003 32 static
|
||||||
|
../Core/Src/icd.c:158:6:check_mode_len 16 static
|
||||||
|
../Core/Src/icd.c:188:6:check_tres 16 static
|
||||||
|
../Core/Src/icd.c:237:6:search_alg 16 static
|
||||||
|
../Core/Src/icd.c:384:10:moving_avarage 24 static
|
||||||
|
../Core/Src/icd.c:403:6:basket_alg 16 static
|
||||||
|
../Core/Src/icd.c:444:6:terapy_start 16 static
|
||||||
|
../Core/Src/icd.c:454:6:hv_pwm 16 static
|
||||||
|
../Core/Src/icd.c:475:6:ll_shock 16 static
|
||||||
|
../Core/Src/icd.c:497:6:hv_charge 16 static
|
||||||
|
../Core/Src/icd.c:556:6:hv_discharge 16 static
|
||||||
|
../Core/Src/icd.c:567:6:hv_shock 16 static
|
||||||
|
../Core/Src/icd.c:595:6:quick_anal 16 static
|
||||||
|
../Core/Src/icd.c:635:6:fibr_terapy 16 static
|
||||||
|
../Core/Src/icd.c:703:6:terapy_algorithm 16 static
|
||||||
@ -0,0 +1,5 @@
|
|||||||
|
../Core/Src/main.c:71:5:main 1
|
||||||
|
../Core/Src/main.c:136:6:SystemClock_Config 4
|
||||||
|
../Core/Src/main.c:191:6:HAL_TIM_PeriodElapsedCallback 3
|
||||||
|
../Core/Src/main.c:214:6:Error_Handler 1
|
||||||
|
../Core/Src/main.c:233:6:assert_failed 1
|
||||||
105
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/main.d
Normal file
105
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/main.d
Normal file
@ -0,0 +1,105 @@
|
|||||||
|
Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
|
||||||
|
../Core/Inc/FreeRTOSConfig.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
|
||||||
|
../Core/Inc/adc.h ../Core/Inc/main.h ../Core/Inc/dma.h ../Core/Inc/tim.h \
|
||||||
|
../Core/Inc/usart.h ../Core/Inc/control.h ../Core/Inc/adc.h \
|
||||||
|
../Core/Inc/gpio.h ../Core/Inc/icd.h ../Core/Inc/gpio.h \
|
||||||
|
../Core/Inc/control.h
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
|
||||||
|
../Core/Inc/FreeRTOSConfig.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
|
||||||
|
../Core/Inc/adc.h:
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Core/Inc/dma.h:
|
||||||
|
../Core/Inc/tim.h:
|
||||||
|
../Core/Inc/usart.h:
|
||||||
|
../Core/Inc/control.h:
|
||||||
|
../Core/Inc/adc.h:
|
||||||
|
../Core/Inc/gpio.h:
|
||||||
|
../Core/Inc/icd.h:
|
||||||
|
../Core/Inc/gpio.h:
|
||||||
|
../Core/Inc/control.h:
|
||||||
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/main.o
Normal file
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/main.o
Normal file
Binary file not shown.
@ -0,0 +1,5 @@
|
|||||||
|
../Core/Src/main.c:71:5:main 8 static
|
||||||
|
../Core/Src/main.c:136:6:SystemClock_Config 88 static
|
||||||
|
../Core/Src/main.c:191:6:HAL_TIM_PeriodElapsedCallback 16 static
|
||||||
|
../Core/Src/main.c:214:6:Error_Handler 4 static,ignoring_inline_asm
|
||||||
|
../Core/Src/main.c:233:6:assert_failed 16 static
|
||||||
@ -0,0 +1,10 @@
|
|||||||
|
../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset 1
|
||||||
|
../Core/Src/parse.c:3:7:unpackFloat 1
|
||||||
|
../Core/Src/parse.c:14:6:check_float 3
|
||||||
|
../Core/Src/parse.c:23:10:unpackUint16 1
|
||||||
|
../Core/Src/parse.c:31:6:check_uint16 3
|
||||||
|
../Core/Src/parse.c:40:9:unpackUint8 1
|
||||||
|
../Core/Src/parse.c:48:6:check_uint8 3
|
||||||
|
../Core/Src/parse.c:57:10:unpackUint32 1
|
||||||
|
../Core/Src/parse.c:68:6:check_uint32 3
|
||||||
|
../Core/Src/parse.c:77:6:parse_command 66
|
||||||
@ -0,0 +1,95 @@
|
|||||||
|
Core/Src/parse.o: ../Core/Src/parse.c ../Core/Inc/parse.h \
|
||||||
|
../Core/Inc/icd.h ../Core/Inc/main.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
|
||||||
|
../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
|
||||||
|
../Core/Inc/adc.h:
|
||||||
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/parse.o
Normal file
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/parse.o
Normal file
Binary file not shown.
@ -0,0 +1,10 @@
|
|||||||
|
../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset 4 static,ignoring_inline_asm
|
||||||
|
../Core/Src/parse.c:3:7:unpackFloat 24 static
|
||||||
|
../Core/Src/parse.c:14:6:check_float 24 static
|
||||||
|
../Core/Src/parse.c:23:10:unpackUint16 24 static
|
||||||
|
../Core/Src/parse.c:31:6:check_uint16 16 static
|
||||||
|
../Core/Src/parse.c:40:9:unpackUint8 24 static
|
||||||
|
../Core/Src/parse.c:48:6:check_uint8 16 static
|
||||||
|
../Core/Src/parse.c:57:10:unpackUint32 24 static
|
||||||
|
../Core/Src/parse.c:68:6:check_uint32 24 static
|
||||||
|
../Core/Src/parse.c:77:6:parse_command 64 static
|
||||||
@ -0,0 +1 @@
|
|||||||
|
../Core/Src/stm32f1xx_hal_msp.c:63:6:HAL_MspInit 1
|
||||||
@ -0,0 +1,56 @@
|
|||||||
|
Core/Src/stm32f1xx_hal_msp.o: ../Core/Src/stm32f1xx_hal_msp.c \
|
||||||
|
../Core/Inc/main.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
Binary file not shown.
@ -0,0 +1 @@
|
|||||||
|
../Core/Src/stm32f1xx_hal_msp.c:63:6:HAL_MspInit 24 static
|
||||||
@ -0,0 +1,3 @@
|
|||||||
|
../Core/Src/stm32f1xx_hal_timebase_tim.c:42:19:HAL_InitTick 5
|
||||||
|
../Core/Src/stm32f1xx_hal_timebase_tim.c:121:6:HAL_SuspendTick 1
|
||||||
|
../Core/Src/stm32f1xx_hal_timebase_tim.c:133:6:HAL_ResumeTick 1
|
||||||
@ -0,0 +1,56 @@
|
|||||||
|
Core/Src/stm32f1xx_hal_timebase_tim.o: \
|
||||||
|
../Core/Src/stm32f1xx_hal_timebase_tim.c \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
Binary file not shown.
@ -0,0 +1,3 @@
|
|||||||
|
../Core/Src/stm32f1xx_hal_timebase_tim.c:42:19:HAL_InitTick 64 static
|
||||||
|
../Core/Src/stm32f1xx_hal_timebase_tim.c:121:6:HAL_SuspendTick 4 static
|
||||||
|
../Core/Src/stm32f1xx_hal_timebase_tim.c:133:6:HAL_ResumeTick 4 static
|
||||||
@ -0,0 +1,11 @@
|
|||||||
|
../Core/Src/stm32f1xx_it.c:74:6:NMI_Handler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:89:6:HardFault_Handler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:104:6:MemManage_Handler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:119:6:BusFault_Handler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:134:6:UsageFault_Handler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:149:6:DebugMon_Handler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:169:6:DMA1_Channel4_IRQHandler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:183:6:DMA1_Channel5_IRQHandler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:197:6:TIM3_IRQHandler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:211:6:TIM4_IRQHandler 1
|
||||||
|
../Core/Src/stm32f1xx_it.c:225:6:USART1_IRQHandler 1
|
||||||
@ -0,0 +1,58 @@
|
|||||||
|
Core/Src/stm32f1xx_it.o: ../Core/Src/stm32f1xx_it.c ../Core/Inc/main.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \
|
||||||
|
../Core/Inc/stm32f1xx_it.h
|
||||||
|
../Core/Inc/main.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
|
../Core/Inc/stm32f1xx_it.h:
|
||||||
Binary file not shown.
@ -0,0 +1,11 @@
|
|||||||
|
../Core/Src/stm32f1xx_it.c:74:6:NMI_Handler 4 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:89:6:HardFault_Handler 4 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:104:6:MemManage_Handler 4 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:119:6:BusFault_Handler 4 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:134:6:UsageFault_Handler 4 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:149:6:DebugMon_Handler 4 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:169:6:DMA1_Channel4_IRQHandler 8 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:183:6:DMA1_Channel5_IRQHandler 8 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:197:6:TIM3_IRQHandler 8 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:211:6:TIM4_IRQHandler 8 static
|
||||||
|
../Core/Src/stm32f1xx_it.c:225:6:USART1_IRQHandler 8 static
|
||||||
@ -0,0 +1,78 @@
|
|||||||
|
################################################################################
|
||||||
|
# Automatically-generated file. Do not edit!
|
||||||
|
# Toolchain: GNU Tools for STM32 (12.3.rel1)
|
||||||
|
################################################################################
|
||||||
|
|
||||||
|
# Add inputs and outputs from these tool invocations to the build variables
|
||||||
|
C_SRCS += \
|
||||||
|
../Core/Src/adc.c \
|
||||||
|
../Core/Src/control.c \
|
||||||
|
../Core/Src/dma.c \
|
||||||
|
../Core/Src/filter.c \
|
||||||
|
../Core/Src/freertos.c \
|
||||||
|
../Core/Src/gpio.c \
|
||||||
|
../Core/Src/icd.c \
|
||||||
|
../Core/Src/main.c \
|
||||||
|
../Core/Src/parse.c \
|
||||||
|
../Core/Src/stm32f1xx_hal_msp.c \
|
||||||
|
../Core/Src/stm32f1xx_hal_timebase_tim.c \
|
||||||
|
../Core/Src/stm32f1xx_it.c \
|
||||||
|
../Core/Src/syscalls.c \
|
||||||
|
../Core/Src/sysmem.c \
|
||||||
|
../Core/Src/system_stm32f1xx.c \
|
||||||
|
../Core/Src/tim.c \
|
||||||
|
../Core/Src/usart.c \
|
||||||
|
../Core/Src/usart_ring.c
|
||||||
|
|
||||||
|
OBJS += \
|
||||||
|
./Core/Src/adc.o \
|
||||||
|
./Core/Src/control.o \
|
||||||
|
./Core/Src/dma.o \
|
||||||
|
./Core/Src/filter.o \
|
||||||
|
./Core/Src/freertos.o \
|
||||||
|
./Core/Src/gpio.o \
|
||||||
|
./Core/Src/icd.o \
|
||||||
|
./Core/Src/main.o \
|
||||||
|
./Core/Src/parse.o \
|
||||||
|
./Core/Src/stm32f1xx_hal_msp.o \
|
||||||
|
./Core/Src/stm32f1xx_hal_timebase_tim.o \
|
||||||
|
./Core/Src/stm32f1xx_it.o \
|
||||||
|
./Core/Src/syscalls.o \
|
||||||
|
./Core/Src/sysmem.o \
|
||||||
|
./Core/Src/system_stm32f1xx.o \
|
||||||
|
./Core/Src/tim.o \
|
||||||
|
./Core/Src/usart.o \
|
||||||
|
./Core/Src/usart_ring.o
|
||||||
|
|
||||||
|
C_DEPS += \
|
||||||
|
./Core/Src/adc.d \
|
||||||
|
./Core/Src/control.d \
|
||||||
|
./Core/Src/dma.d \
|
||||||
|
./Core/Src/filter.d \
|
||||||
|
./Core/Src/freertos.d \
|
||||||
|
./Core/Src/gpio.d \
|
||||||
|
./Core/Src/icd.d \
|
||||||
|
./Core/Src/main.d \
|
||||||
|
./Core/Src/parse.d \
|
||||||
|
./Core/Src/stm32f1xx_hal_msp.d \
|
||||||
|
./Core/Src/stm32f1xx_hal_timebase_tim.d \
|
||||||
|
./Core/Src/stm32f1xx_it.d \
|
||||||
|
./Core/Src/syscalls.d \
|
||||||
|
./Core/Src/sysmem.d \
|
||||||
|
./Core/Src/system_stm32f1xx.d \
|
||||||
|
./Core/Src/tim.d \
|
||||||
|
./Core/Src/usart.d \
|
||||||
|
./Core/Src/usart_ring.d
|
||||||
|
|
||||||
|
|
||||||
|
# Each subdirectory must supply rules for building sources it contributes
|
||||||
|
Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
|
||||||
|
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xB -c -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3 -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||||
|
|
||||||
|
clean: clean-Core-2f-Src
|
||||||
|
|
||||||
|
clean-Core-2f-Src:
|
||||||
|
-$(RM) ./Core/Src/adc.cyclo ./Core/Src/adc.d ./Core/Src/adc.o ./Core/Src/adc.su ./Core/Src/control.cyclo ./Core/Src/control.d ./Core/Src/control.o ./Core/Src/control.su ./Core/Src/dma.cyclo ./Core/Src/dma.d ./Core/Src/dma.o ./Core/Src/dma.su ./Core/Src/filter.cyclo ./Core/Src/filter.d ./Core/Src/filter.o ./Core/Src/filter.su ./Core/Src/freertos.cyclo ./Core/Src/freertos.d ./Core/Src/freertos.o ./Core/Src/freertos.su ./Core/Src/gpio.cyclo ./Core/Src/gpio.d ./Core/Src/gpio.o ./Core/Src/gpio.su ./Core/Src/icd.cyclo ./Core/Src/icd.d ./Core/Src/icd.o ./Core/Src/icd.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/parse.cyclo ./Core/Src/parse.d ./Core/Src/parse.o ./Core/Src/parse.su ./Core/Src/stm32f1xx_hal_msp.cyclo ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_hal_msp.su ./Core/Src/stm32f1xx_hal_timebase_tim.cyclo ./Core/Src/stm32f1xx_hal_timebase_tim.d ./Core/Src/stm32f1xx_hal_timebase_tim.o ./Core/Src/stm32f1xx_hal_timebase_tim.su ./Core/Src/stm32f1xx_it.cyclo ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/stm32f1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f1xx.cyclo ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o ./Core/Src/system_stm32f1xx.su ./Core/Src/tim.cyclo ./Core/Src/tim.d ./Core/Src/tim.o ./Core/Src/tim.su ./Core/Src/usart.cyclo ./Core/Src/usart.d ./Core/Src/usart.o ./Core/Src/usart.su ./Core/Src/usart_ring.cyclo ./Core/Src/usart_ring.d ./Core/Src/usart_ring.o ./Core/Src/usart_ring.su
|
||||||
|
|
||||||
|
.PHONY: clean-Core-2f-Src
|
||||||
|
|
||||||
@ -0,0 +1,18 @@
|
|||||||
|
../Core/Src/syscalls.c:44:6:initialise_monitor_handles 1
|
||||||
|
../Core/Src/syscalls.c:48:5:_getpid 1
|
||||||
|
../Core/Src/syscalls.c:53:5:_kill 1
|
||||||
|
../Core/Src/syscalls.c:61:6:_exit 1
|
||||||
|
../Core/Src/syscalls.c:67:27:_read 2
|
||||||
|
../Core/Src/syscalls.c:80:27:_write 2
|
||||||
|
../Core/Src/syscalls.c:92:5:_close 1
|
||||||
|
../Core/Src/syscalls.c:99:5:_fstat 1
|
||||||
|
../Core/Src/syscalls.c:106:5:_isatty 1
|
||||||
|
../Core/Src/syscalls.c:112:5:_lseek 1
|
||||||
|
../Core/Src/syscalls.c:120:5:_open 1
|
||||||
|
../Core/Src/syscalls.c:128:5:_wait 1
|
||||||
|
../Core/Src/syscalls.c:135:5:_unlink 1
|
||||||
|
../Core/Src/syscalls.c:142:5:_times 1
|
||||||
|
../Core/Src/syscalls.c:148:5:_stat 1
|
||||||
|
../Core/Src/syscalls.c:155:5:_link 1
|
||||||
|
../Core/Src/syscalls.c:163:5:_fork 1
|
||||||
|
../Core/Src/syscalls.c:169:5:_execve 1
|
||||||
@ -0,0 +1 @@
|
|||||||
|
Core/Src/syscalls.o: ../Core/Src/syscalls.c
|
||||||
Binary file not shown.
@ -0,0 +1,18 @@
|
|||||||
|
../Core/Src/syscalls.c:44:6:initialise_monitor_handles 4 static
|
||||||
|
../Core/Src/syscalls.c:48:5:_getpid 4 static
|
||||||
|
../Core/Src/syscalls.c:53:5:_kill 16 static
|
||||||
|
../Core/Src/syscalls.c:61:6:_exit 16 static
|
||||||
|
../Core/Src/syscalls.c:67:27:_read 32 static
|
||||||
|
../Core/Src/syscalls.c:80:27:_write 32 static
|
||||||
|
../Core/Src/syscalls.c:92:5:_close 16 static
|
||||||
|
../Core/Src/syscalls.c:99:5:_fstat 16 static
|
||||||
|
../Core/Src/syscalls.c:106:5:_isatty 16 static
|
||||||
|
../Core/Src/syscalls.c:112:5:_lseek 24 static
|
||||||
|
../Core/Src/syscalls.c:120:5:_open 12 static
|
||||||
|
../Core/Src/syscalls.c:128:5:_wait 16 static
|
||||||
|
../Core/Src/syscalls.c:135:5:_unlink 16 static
|
||||||
|
../Core/Src/syscalls.c:142:5:_times 16 static
|
||||||
|
../Core/Src/syscalls.c:148:5:_stat 16 static
|
||||||
|
../Core/Src/syscalls.c:155:5:_link 16 static
|
||||||
|
../Core/Src/syscalls.c:163:5:_fork 8 static
|
||||||
|
../Core/Src/syscalls.c:169:5:_execve 24 static
|
||||||
@ -0,0 +1 @@
|
|||||||
|
../Core/Src/sysmem.c:53:7:_sbrk 3
|
||||||
@ -0,0 +1 @@
|
|||||||
|
Core/Src/sysmem.o: ../Core/Src/sysmem.c
|
||||||
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/sysmem.o
Normal file
BIN
1_iteration/firmware/ECG_D_0001_31102024/Debug/Core/Src/sysmem.o
Normal file
Binary file not shown.
@ -0,0 +1 @@
|
|||||||
|
../Core/Src/sysmem.c:53:7:_sbrk 32 static
|
||||||
@ -0,0 +1,2 @@
|
|||||||
|
../Core/Src/system_stm32f1xx.c:175:6:SystemInit 1
|
||||||
|
../Core/Src/system_stm32f1xx.c:224:6:SystemCoreClockUpdate 7
|
||||||
@ -0,0 +1,55 @@
|
|||||||
|
Core/Src/system_stm32f1xx.o: ../Core/Src/system_stm32f1xx.c \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
|
||||||
|
../Drivers/CMSIS/Include/core_cm3.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||||
|
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||||
|
../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
|
||||||
|
../Core/Inc/stm32f1xx_hal_conf.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
|
||||||
|
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
|
||||||
Binary file not shown.
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Reference in New Issue
Block a user