diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/.settings/language.settings.xml b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/.settings/language.settings.xml
index e31154d..398f7bb 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/.settings/language.settings.xml
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/.settings/language.settings.xml
@@ -5,7 +5,7 @@
-
+
@@ -16,7 +16,7 @@
-
+
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/icd.h b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/icd.h
index 333a3a5..5433050 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/icd.h
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/icd.h
@@ -17,7 +17,7 @@
#define CAPACITY 0.000200
#define FORCE_DELAY 100 //Задержка МС после зарядки конденсатора в принудительном режиме
#define DANGER_HV true //чтобы риту не ёбнуло если 1 значит по реальному заряжаем
-
+#define SAFE_VOLTAGE 100
#define RG 1000.0//сопротивление резистора в омах
@@ -379,6 +379,7 @@ void ll_h_off(void);
void ll_h_1_side(half_br state);
void ll_h_2_side(half_br state);
void ll_bi_dis(void);
+void ll_bi_shock_param(icd_str * icd_str);
void ra_lv_control(icd_str * icd_str,lv_sub_mode mode);
void rv_lv_control(icd_str * icd_str,lv_sub_mode mode);
@@ -387,4 +388,6 @@ void hv_en_control(bool en_RV, bool en_SCV, bool en_CAN);
void hv_en_rv(bool state);
void hv_en_scv(bool state);
void hv_en_can(bool state);
+
+void delay_critical(uint8_t delay);
#endif
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/tim.h b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/tim.h
index 61a3e82..9399d73 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/tim.h
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Inc/tim.h
@@ -44,6 +44,8 @@ extern TIM_HandleTypeDef htim6;
extern TIM_HandleTypeDef htim9;
+extern TIM_HandleTypeDef htim11;
+
extern TIM_HandleTypeDef htim14;
/* USER CODE BEGIN Private defines */
@@ -56,6 +58,7 @@ void MX_TIM3_Init(void);
void MX_TIM4_Init(void);
void MX_TIM6_Init(void);
void MX_TIM9_Init(void);
+void MX_TIM11_Init(void);
void MX_TIM14_Init(void);
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/adc.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/adc.c
index f3499ee..648dee6 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/adc.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/adc.c
@@ -264,7 +264,7 @@ void adc_read(adc_struct* adc)
adc->error = HAL_ADC_Start(&hadc1);
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
adc->bat_raw = HAL_ADC_GetValue(&hadc1);
- adc->bat_volt = ((uint32_t)(adc->bat_raw) * 6600)/4095 + 40;//40 миливольт падение на идеальном диоде
+ adc->bat_volt = ((uint32_t)(adc->bat_raw) * 6600)/4095;
adc->bat_pers = volt_to_pers(adc->bat_volt);//40 миливольт падение на идеальном диоде
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/control.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/control.c
index 88d95f3..96b4387 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/control.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/control.c
@@ -37,6 +37,13 @@ void lets_sleep(void)
HAL_GPIO_WritePin(POT_PWR_GPIO_Port, POT_PWR_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(BLE_PWR_GPIO_Port, BLE_PWR_Pin, SET);
+
+// hv_pwm(false);
+// hv_power(false);
+// hv_ll_control(z_state, z_state, z_state);
+// HAL_Delay(20);
+// relay_all_control(false, false, false);
+
HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN1);
//Сейчас второй кнопки нет!!
//HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN2);//если вторая кнопка тоже подключена PC0
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/freertos.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/freertos.c
index cb697c2..7abb033 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/freertos.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/freertos.c
@@ -279,7 +279,9 @@ void StartButTask(void const * argument)
/* Infinite loop */
for (;;)
{
- if (HAL_GPIO_ReadPin(BUT_1_GPIO_Port, BUT_1_Pin) == GPIO_PIN_SET)
+ //отрабатываем кнопку только если не в режиме заряда и нет напряжения на КОНДЕНСАТОРЕ
+ if (HAL_GPIO_ReadPin(BUT_1_GPIO_Port, BUT_1_Pin) == GPIO_PIN_SET
+ && ICD.work_set_mode == Monitor && adc_str.hv_volt < SAFE_VOLTAGE)
{
Control.btn_1_state = true;
Control.btn_1_cnt++;
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/gpio.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/gpio.c
index 0b6cc5f..3b00fef 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/gpio.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/gpio.c
@@ -65,7 +65,7 @@ void MX_GPIO_Init(void)
HAL_GPIO_WritePin(RA_LV_SHOCK_GPIO_Port, RA_LV_SHOCK_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOB, RA_LV_DIS_Pin|HV_EN_RV_Pin|RV_LV_SHOCK_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(GPIOB, RA_LV_DIS_Pin|HV_EN_RV_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, RA_LV_COIL_TO_GND_Pin|RA_LV_TIP_TO_GND_Pin|CAN_LV_TO_GND_Pin|POT_CS_1_Pin
@@ -122,11 +122,9 @@ void MX_GPIO_Init(void)
HAL_GPIO_Init(RA_LV_SHOCK_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : PBPin PBPin PBPin PBPin
- PBPin PBPin PBPin PBPin
- PBPin */
+ PBPin PBPin PBPin PBPin */
GPIO_InitStruct.Pin = RA_LV_DIS_Pin|RA_LV_COIL_TO_GND_Pin|RA_LV_TIP_TO_GND_Pin|CAN_LV_TO_GND_Pin
- |POT_PWR_Pin|HV_HS_RV_Pin|HV_EN_RV_Pin|HV_LS_RV_Pin
- |RV_LV_SHOCK_Pin;
+ |POT_PWR_Pin|HV_HS_RV_Pin|HV_EN_RV_Pin|HV_LS_RV_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/icd.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/icd.c
index e885d98..d631e91 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/icd.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/icd.c
@@ -6,6 +6,7 @@
#include
#endif
+extern TIM_HandleTypeDef htim11;
icd_str ICD;
extern adc_struct adc_str;//структура ацп
@@ -50,7 +51,7 @@ void init_icd(icd_str * icd_str)
icd_str->triangle_coef = TRIANGLE_COEF;
icd_str->lv_polarity = lv_bipolar;//полярность низковольтной стимуляции
- icd_str->lv_mode = lv_mode_VVI;//режим низковольтной стимуляции
+ icd_str->lv_mode = lv_mode_none;//режим низковольтной стимуляции
icd_str->lv_shock_time = 13;//время импульса низковольной стимуляции 1-20(0,1-2мс) одна единица 0,1мс шаг 0.1мс
icd_str->lv_relax_time = 14;//время стабилизации после удара низковольной стимуляции 0-20(0-20мс) одна единица 1мс шаг 1мс
@@ -111,6 +112,16 @@ void init_icd(icd_str * icd_str)
icd_str->hv_step_number = HV_STEP_NUM;//сколько шагов ВВ терапии?
icd_str->hv_step_cnt = 0;// какой сейчас шаг?
+ icd_str->hv_polarity = rv_neg_scv_poz; //полярность стимуляции
+ icd_str->hv_mode = hv_mode_fixed; //тип способа задания длительности импульса
+ //время константы времени стимуляции
+ icd_str->hv_phase_1_duration = 100; // время в десятых мс приходящееся на 1 фазу 30-120(3-12мс) одна единица 0,1мс
+ icd_str->hv_phase_2_duration = 70; // время в десятых мс приходящееся на 2 фазу 20-100(2-10мс) одна единица 0,1мс
+ icd_str->hv_switch_duration = 30; // время в десятых мс приходящееся на переключение между фазами 10-30(1-3мс) одна единица 0,1мс
+ //процентные параметры стимуляции
+ icd_str->hv_switching_voltage = 40;//процент напряжения при котором происходит завешение 1 фазы при адаптивном режиме (20-80) одна единица 1%
+ icd_str->hv_cutoff_voltage = 20;//процент напряжения при котором происходит завешение 2 фазы при адаптивном режиме (5-50) одна единица 1%
+
icd_str->min_energy = MIN_ENERGY;
icd_str->max_energy = MAX_ENERGY;
@@ -507,7 +518,7 @@ void hv_charge(icd_str *icd_str)
}
else
{
- if (DANGER_HV)
+ if (DANGER_HV && icd_str->HV_on)
{
hv_pwm(true); //включили шим для заряда конденсатора
}
@@ -566,7 +577,7 @@ void hv_shock(icd_str * icd_str)
//подали питание на плату только если не в режиме мониторинга
if(icd_str->work_set_mode != Monitor)//fixme
{
- ll_bi_dis();
+ ll_bi_shock_param(icd_str);
}
else
{
@@ -745,6 +756,11 @@ void terapy_algorithm(icd_str * icd_str)
}
break;
}
+
+ if(icd_str->work_set_mode == Monitor && adc_str.hv_volt < SAFE_VOLTAGE/2)
+ {
+ hv_discharge(false);//выключили разряд
+ }
}
//единое управление реле по идее вызываем один раз когда собираемся ударить не важно тестово или по настоящему
@@ -888,38 +904,64 @@ void hv_discharge(bool state)
}
}
-
-
-////разряд биполярный
-void ll_bi_dis(void)
+////разряд биполярный с выбором параметров
+void ll_bi_shock_param(icd_str * icd_str)
{
+ //сперва тупо парсим параметры из основной структуры
+ //хватаем параметры в локальные переменные чтобы ничего не поменялось
+ hv_polarity polarity = icd_str->hv_polarity;
+ hv_mode mode = icd_str->hv_mode;
+
+ // время в десятых мс приходящееся на 1 фазу 30-120(3-12мс) одна единица 0,1мс
+ uint8_t hv_phase_1_duration = icd_str->hv_phase_1_duration;
+ // время в десятых мс приходящееся на 2 фазу 20-100(2-10мс) одна единица 0,1мс
+ uint8_t hv_phase_2_duration = icd_str->hv_phase_2_duration;
+ // время в десятых мс приходящееся на переключение между фазами 10-30(1-3мс) одна единица 0,1мс
+ uint8_t hv_switch_duration = icd_str->hv_switch_duration;
+
+ //процент напряжения при котором происходит завешение 1 фазы при адаптивном режиме (20-80) одна единица 1%
+ uint8_t hv_switching_voltage = icd_str->hv_switching_voltage;
+ //процент напряжения при котором происходит завешение 2 фазы при адаптивном режиме (5-50) одна единица 1%
+ uint8_t hv_cutoff_voltage = icd_str->hv_cutoff_voltage;
+
+ bool HV_on = icd_str->HV_on;
//защитили низковольтную часть
relay_all_control(true,true,true);
- hv_en_control(false, false, false);
- //чтобы не пробило перевели в разамкнутое состояние все полумосты
- hv_ll_control(z_state, z_state, z_state);
- osDelay(15);
- hv_power(true);
- osDelay(5);
- hv_en_control(true, true, false);
- osDelay(2);
- //Сторона 1 +
- hv_ll_control(low, high, z_state);
- osDelay(7);
- //чтобы не пробило перевели в разамкнутое состояние все полумосты
- hv_ll_control(z_state, z_state, z_state);
- osDelay(2);
- //Сторона 2 +
- hv_ll_control(high, low, z_state);
- osDelay(4);
- hv_en_control(false, false, false);
- hv_ll_control(z_state, z_state, z_state);
osDelay(20);
+ if(HV_on)
+ {
+ //чтобы не пробило перевели в разамкнутое состояние все полумосты
+ hv_ll_control(z_state, z_state, z_state);
+ osDelay(2);//временно
+
+ hv_en_control(true,true,false);
+ osDelay(2);//временно
+ //первая волна
+ hv_ll_control(low, high, z_state);
+ delay_critical(hv_phase_1_duration);
+ // osDelay(2);//временно
+ //остановка
+ //чтобы не пробило перевели в разамкнутое состояние все полумосты
+ hv_ll_control(z_state, z_state, z_state);
+ delay_critical(hv_switch_duration);
+ // osDelay(2);//временно
+ //вторая волна
+ hv_ll_control(high, low, z_state);
+ delay_critical(hv_phase_2_duration);
+ // osDelay(2);
+ //отключение
+ hv_ll_control(z_state, z_state, z_state);
+ hv_en_control(false,false,false);
+ osDelay(2);//временно
+ osDelay(20);
+ }
relay_all_control(false,false,false);
osDelay(2);//
}
+
+
void ra_lv_control(icd_str * icd_str,lv_sub_mode mode)
{
switch (mode)
@@ -941,9 +983,9 @@ void ra_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RA_LV_DIS_GPIO_Port, RA_LV_DIS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(RA_LV_SHOCK_GPIO_Port, RA_LV_SHOCK_Pin, GPIO_PIN_SET);
- TIM4->CCR1 = 200;
- TIM4->CCR2 = 200;
- TIM4->CCR3 = 200;
+ TIM4->CCR1 = 500;
+ TIM4->CCR2 = 500;
+ TIM4->CCR3 = 500;
osDelay(2);
TIM4->CCR1 = 0;
TIM4->CCR2 = 0;
@@ -993,7 +1035,6 @@ void rv_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RV_LV_TIP_TO_GND_GPIO_Port, RV_LV_TIP_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RV_LV_COIL_TO_GND_GPIO_Port, RV_LV_COIL_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RV_LV_DIS_GPIO_Port, RV_LV_DIS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(RV_LV_SHOCK_GPIO_Port, RV_LV_SHOCK_Pin, GPIO_PIN_SET);
}
break;
//Заряд без всякого вмешательства tip и coil идёт заряд
@@ -1002,7 +1043,6 @@ void rv_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RV_LV_TIP_TO_GND_GPIO_Port, RV_LV_TIP_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RV_LV_COIL_TO_GND_GPIO_Port, RV_LV_COIL_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RV_LV_DIS_GPIO_Port, RV_LV_DIS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(RV_LV_SHOCK_GPIO_Port, RV_LV_SHOCK_Pin, GPIO_PIN_SET);
osDelay(2);
TIM2->CCR2 = 500;
TIM2->CCR3 = 500;
@@ -1020,14 +1060,11 @@ void rv_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RV_LV_TIP_TO_GND_GPIO_Port, RV_LV_TIP_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RV_LV_COIL_TO_GND_GPIO_Port, RV_LV_COIL_TO_GND_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(RV_LV_DIS_GPIO_Port, RV_LV_DIS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(RV_LV_SHOCK_GPIO_Port, RV_LV_SHOCK_Pin, GPIO_PIN_RESET);
uint32_t shock_time = (uint32_t) (icd_str->lv_shock_time);
- taskENTER_CRITICAL();
- delay_us((shock_time*125)/10);
- taskEXIT_CRITICAL();
-// osDelay(1);
- HAL_GPIO_WritePin(RV_LV_SHOCK_GPIO_Port, RV_LV_SHOCK_Pin, GPIO_PIN_SET);
+ __HAL_TIM_SET_COUNTER(&htim11, 0);
+ __HAL_TIM_SET_COMPARE(&htim11, TIM_CHANNEL_1, 30-shock_time); //установка задержки перед импульсом
+ TIM11->CR1 |= TIM_CR1_CEN;
}
break;
//Релаксация tip и coil притянуты к земле
@@ -1036,7 +1073,6 @@ void rv_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RV_LV_TIP_TO_GND_GPIO_Port, RV_LV_TIP_TO_GND_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(RV_LV_COIL_TO_GND_GPIO_Port, RV_LV_COIL_TO_GND_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(RV_LV_DIS_GPIO_Port, RV_LV_DIS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(RV_LV_SHOCK_GPIO_Port, RV_LV_SHOCK_Pin, GPIO_PIN_SET);
osDelay(20);
}
break;
@@ -1046,7 +1082,6 @@ void rv_lv_control(icd_str * icd_str,lv_sub_mode mode)
HAL_GPIO_WritePin(RV_LV_TIP_TO_GND_GPIO_Port, RV_LV_TIP_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RV_LV_COIL_TO_GND_GPIO_Port, RV_LV_COIL_TO_GND_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(RV_LV_DIS_GPIO_Port, RV_LV_DIS_Pin, GPIO_PIN_RESET);
- HAL_GPIO_WritePin(RV_LV_SHOCK_GPIO_Port, RV_LV_SHOCK_Pin, GPIO_PIN_SET);
}
break;
}
@@ -1084,3 +1119,11 @@ void hv_en_can(bool state)
else
HAL_GPIO_WritePin(HV_EN_CAN_GPIO_Port, HV_EN_CAN_Pin, GPIO_PIN_SET);
}
+
+void delay_critical(uint8_t delay)
+{
+ uint32_t shock_time = (uint32_t) (delay);
+ taskENTER_CRITICAL();
+ delay_us((shock_time*125)/10);
+ taskEXIT_CRITICAL();
+}
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/main.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/main.c
index 77ca9b0..9e5a12a 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/main.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/main.c
@@ -106,6 +106,7 @@ int main(void)
MX_TIM9_Init();
MX_TIM14_Init();
MX_TIM6_Init();
+ MX_TIM11_Init();
/* USER CODE BEGIN 2 */
hv_pwm(false);
hv_power(false);
@@ -141,6 +142,7 @@ int main(void)
// Таймер Звука
HAL_TIM_PWM_Start(&htim9, TIM_CHANNEL_2);
// fixme добавить ещё таймеров
+ HAL_TIM_OnePulse_Start(&htim11, TIM_CHANNEL_1);
//Включили питание АЦП
HAL_GPIO_WritePin(INA_PWR_GPIO_Port, INA_PWR_Pin, SET);
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/parse.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/parse.c
index afbe89a..fdd835d 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/parse.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/parse.c
@@ -233,11 +233,24 @@ void parse_command(uint8_t* buf, icd_str * icd_str)
}
}
break;
- //bool LV_on //bool HV_on
+ //bool LV_on
case 0x0E:
{
- // не стала делать, не используется же пока
-
+ uint8_t idata = unpackUint8(&buf[2]);
+ if (check_uint8(idata, 0, 1))
+ {
+ icd_str->LV_on = (bool) idata;
+ }
+ }
+ break;
+ //bool HV_on
+ case 0x0F:
+ {
+ uint8_t idata = unpackUint8(&buf[2]);
+ if (check_uint8(idata, 0, 1))
+ {
+ icd_str->HV_on = (bool) idata;
+ }
}
break;
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/stm32f4xx_it.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/stm32f4xx_it.c
index 0146683..1fdfa11 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/stm32f4xx_it.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/stm32f4xx_it.c
@@ -269,5 +269,11 @@ void DMA2_Stream7_IRQHandler(void)
}
/* USER CODE BEGIN 1 */
-
+//void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
+//{
+// if(htim->Instance == TIM11)
+// {
+// HAL_TIM_PWM_Stop_IT(&htim11, TIM_CHANNEL_1);
+// }
+//}
/* USER CODE END 1 */
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/tim.c b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/tim.c
index 09ed69f..45a0a86 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/tim.c
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Core/Src/tim.c
@@ -30,6 +30,7 @@ TIM_HandleTypeDef htim3;
TIM_HandleTypeDef htim4;
TIM_HandleTypeDef htim6;
TIM_HandleTypeDef htim9;
+TIM_HandleTypeDef htim11;
TIM_HandleTypeDef htim14;
/* TIM1 init function */
@@ -379,6 +380,51 @@ void MX_TIM9_Init(void)
/* USER CODE END TIM9_Init 2 */
HAL_TIM_MspPostInit(&htim9);
+}
+/* TIM11 init function */
+void MX_TIM11_Init(void)
+{
+
+ /* USER CODE BEGIN TIM11_Init 0 */
+
+ /* USER CODE END TIM11_Init 0 */
+
+ TIM_OC_InitTypeDef sConfigOC = {0};
+
+ /* USER CODE BEGIN TIM11_Init 1 */
+
+ /* USER CODE END TIM11_Init 1 */
+ htim11.Instance = TIM11;
+ htim11.Init.Prescaler = 2399;
+ htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
+ htim11.Init.Period = 29;
+ htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_TIM_PWM_Init(&htim11) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_TIM_OnePulse_Init(&htim11, TIM_OPMODE_SINGLE) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sConfigOC.OCMode = TIM_OCMODE_PWM2;
+ sConfigOC.Pulse = 0;
+ sConfigOC.OCPolarity = TIM_OCPOLARITY_LOW;
+ sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN TIM11_Init 2 */
+
+ /* USER CODE END TIM11_Init 2 */
+ HAL_TIM_MspPostInit(&htim11);
+
}
/* TIM14 init function */
void MX_TIM14_Init(void)
@@ -480,6 +526,17 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE END TIM9_MspInit 1 */
}
+ else if(tim_baseHandle->Instance==TIM11)
+ {
+ /* USER CODE BEGIN TIM11_MspInit 0 */
+
+ /* USER CODE END TIM11_MspInit 0 */
+ /* TIM11 clock enable */
+ __HAL_RCC_TIM11_CLK_ENABLE();
+ /* USER CODE BEGIN TIM11_MspInit 1 */
+
+ /* USER CODE END TIM11_MspInit 1 */
+ }
else if(tim_baseHandle->Instance==TIM14)
{
/* USER CODE BEGIN TIM14_MspInit 0 */
@@ -616,6 +673,27 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
/* USER CODE END TIM9_MspPostInit 1 */
}
+ else if(timHandle->Instance==TIM11)
+ {
+ /* USER CODE BEGIN TIM11_MspPostInit 0 */
+
+ /* USER CODE END TIM11_MspPostInit 0 */
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ /**TIM11 GPIO Configuration
+ PB9 ------> TIM11_CH1
+ */
+ GPIO_InitStruct.Pin = RV_LV_SHOCK_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
+ GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
+ HAL_GPIO_Init(RV_LV_SHOCK_GPIO_Port, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN TIM11_MspPostInit 1 */
+
+ /* USER CODE END TIM11_MspPostInit 1 */
+ }
}
@@ -691,6 +769,17 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE END TIM9_MspDeInit 1 */
}
+ else if(tim_baseHandle->Instance==TIM11)
+ {
+ /* USER CODE BEGIN TIM11_MspDeInit 0 */
+
+ /* USER CODE END TIM11_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM11_CLK_DISABLE();
+ /* USER CODE BEGIN TIM11_MspDeInit 1 */
+
+ /* USER CODE END TIM11_MspDeInit 1 */
+ }
else if(tim_baseHandle->Instance==TIM14)
{
/* USER CODE BEGIN TIM14_MspDeInit 0 */
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/adc.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/adc.o
index fdeada0..2a28048 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/adc.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/adc.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/control.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/control.o
index e358897..7ff762c 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/control.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/control.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.cyclo
index 3bcb148..9a0fec5 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.cyclo
@@ -4,4 +4,4 @@
../Core/Src/freertos.c:191:6:StartOprosTask 6
../Core/Src/freertos.c:229:6:StartControlTask 1
../Core/Src/freertos.c:248:6:StartLowSpeedTask 2
-../Core/Src/freertos.c:276:6:StartButTask 3
+../Core/Src/freertos.c:276:6:StartButTask 5
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.o
index 71ded48..64fbf64 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/freertos.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/gpio.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/gpio.o
index 5e74a2a..428464c 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/gpio.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/gpio.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.cyclo
index 4b987f4..8c3bfdf 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.cyclo
@@ -1,35 +1,36 @@
-../Core/Src/icd.c:12:6:init_icd 1
-../Core/Src/icd.c:126:7:my_abs 2
-../Core/Src/icd.c:132:6:mode_start 2
-../Core/Src/icd.c:144:6:get_data 2
-../Core/Src/icd.c:158:6:get_data_max30003 1
-../Core/Src/icd.c:169:6:check_mode_len 4
-../Core/Src/icd.c:199:6:check_tres 11
-../Core/Src/icd.c:249:6:search_alg 27
-../Core/Src/icd.c:386:10:moving_avarage 3
-../Core/Src/icd.c:405:6:basket_alg 8
-../Core/Src/icd.c:445:6:terapy_start 2
-../Core/Src/icd.c:456:6:hv_pwm 2
-../Core/Src/icd.c:475:6:hv_sound 2
-../Core/Src/icd.c:492:6:hv_charge 4
-../Core/Src/icd.c:558:6:hv_shock 2
-../Core/Src/icd.c:584:6:quick_analyse 4
-../Core/Src/icd.c:624:6:fibr_terapy 6
-../Core/Src/icd.c:696:6:terapy_algorithm 7
-../Core/Src/icd.c:751:6:relay_all_control 1
-../Core/Src/icd.c:758:6:relay_ra_control 2
-../Core/Src/icd.c:767:6:relay_rv_control 2
-../Core/Src/icd.c:775:6:relay_can_control 2
-../Core/Src/icd.c:784:6:hv_ll_control 1
-../Core/Src/icd.c:792:6:hv_power 2
-../Core/Src/icd.c:807:6:hv_ll_rv_control 3
-../Core/Src/icd.c:830:6:hv_ll_scv_control 3
-../Core/Src/icd.c:853:6:hv_ll_can_control 3
-../Core/Src/icd.c:877:6:hv_discharge 2
-../Core/Src/icd.c:894:6:ll_bi_dis 1
-../Core/Src/icd.c:923:6:ra_lv_control 6
-../Core/Src/icd.c:986:6:rv_lv_control 6
-../Core/Src/icd.c:1056:6:hv_en_control 1
-../Core/Src/icd.c:1064:6:hv_en_rv 2
-../Core/Src/icd.c:1072:6:hv_en_scv 2
-../Core/Src/icd.c:1080:6:hv_en_can 2
+../Core/Src/icd.c:13:6:init_icd 1
+../Core/Src/icd.c:137:7:my_abs 2
+../Core/Src/icd.c:143:6:mode_start 2
+../Core/Src/icd.c:155:6:get_data 2
+../Core/Src/icd.c:169:6:get_data_max30003 1
+../Core/Src/icd.c:180:6:check_mode_len 4
+../Core/Src/icd.c:210:6:check_tres 11
+../Core/Src/icd.c:260:6:search_alg 27
+../Core/Src/icd.c:397:10:moving_avarage 3
+../Core/Src/icd.c:416:6:basket_alg 8
+../Core/Src/icd.c:456:6:terapy_start 2
+../Core/Src/icd.c:467:6:hv_pwm 2
+../Core/Src/icd.c:486:6:hv_sound 2
+../Core/Src/icd.c:503:6:hv_charge 5
+../Core/Src/icd.c:569:6:hv_shock 2
+../Core/Src/icd.c:595:6:quick_analyse 4
+../Core/Src/icd.c:635:6:fibr_terapy 6
+../Core/Src/icd.c:707:6:terapy_algorithm 9
+../Core/Src/icd.c:767:6:relay_all_control 1
+../Core/Src/icd.c:774:6:relay_ra_control 2
+../Core/Src/icd.c:783:6:relay_rv_control 2
+../Core/Src/icd.c:791:6:relay_can_control 2
+../Core/Src/icd.c:800:6:hv_ll_control 1
+../Core/Src/icd.c:808:6:hv_power 2
+../Core/Src/icd.c:823:6:hv_ll_rv_control 3
+../Core/Src/icd.c:846:6:hv_ll_scv_control 3
+../Core/Src/icd.c:869:6:hv_ll_can_control 3
+../Core/Src/icd.c:893:6:hv_discharge 2
+../Core/Src/icd.c:908:6:ll_bi_shock_param 2
+../Core/Src/icd.c:965:6:ra_lv_control 6
+../Core/Src/icd.c:1028:6:rv_lv_control 6
+../Core/Src/icd.c:1091:6:hv_en_control 1
+../Core/Src/icd.c:1099:6:hv_en_rv 2
+../Core/Src/icd.c:1107:6:hv_en_scv 2
+../Core/Src/icd.c:1115:6:hv_en_can 2
+../Core/Src/icd.c:1123:6:delay_critical 1
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.o
index 7e3e632..35d1dc9 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.su b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.su
index 14d689f..10b83bf 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.su
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/icd.su
@@ -1,35 +1,36 @@
-../Core/Src/icd.c:12:6:init_icd 16 static
-../Core/Src/icd.c:126:7:my_abs 16 static
-../Core/Src/icd.c:132:6:mode_start 16 static
-../Core/Src/icd.c:144:6:get_data 32 static
-../Core/Src/icd.c:158:6:get_data_max30003 32 static
-../Core/Src/icd.c:169:6:check_mode_len 16 static
-../Core/Src/icd.c:199:6:check_tres 16 static
-../Core/Src/icd.c:249:6:search_alg 16 static
-../Core/Src/icd.c:386:10:moving_avarage 24 static
-../Core/Src/icd.c:405:6:basket_alg 16 static
-../Core/Src/icd.c:445:6:terapy_start 16 static
-../Core/Src/icd.c:456:6:hv_pwm 16 static
-../Core/Src/icd.c:475:6:hv_sound 16 static
-../Core/Src/icd.c:492:6:hv_charge 32 static
-../Core/Src/icd.c:558:6:hv_shock 16 static
-../Core/Src/icd.c:584:6:quick_analyse 16 static
-../Core/Src/icd.c:624:6:fibr_terapy 16 static
-../Core/Src/icd.c:696:6:terapy_algorithm 16 static
-../Core/Src/icd.c:751:6:relay_all_control 16 static
-../Core/Src/icd.c:758:6:relay_ra_control 16 static
-../Core/Src/icd.c:767:6:relay_rv_control 16 static
-../Core/Src/icd.c:775:6:relay_can_control 16 static
-../Core/Src/icd.c:784:6:hv_ll_control 16 static
-../Core/Src/icd.c:792:6:hv_power 16 static
-../Core/Src/icd.c:807:6:hv_ll_rv_control 16 static
-../Core/Src/icd.c:830:6:hv_ll_scv_control 16 static
-../Core/Src/icd.c:853:6:hv_ll_can_control 16 static
-../Core/Src/icd.c:877:6:hv_discharge 16 static
-../Core/Src/icd.c:894:6:ll_bi_dis 8 static
-../Core/Src/icd.c:923:6:ra_lv_control 16 static
-../Core/Src/icd.c:986:6:rv_lv_control 24 static
-../Core/Src/icd.c:1056:6:hv_en_control 16 static
-../Core/Src/icd.c:1064:6:hv_en_rv 16 static
-../Core/Src/icd.c:1072:6:hv_en_scv 16 static
-../Core/Src/icd.c:1080:6:hv_en_can 16 static
+../Core/Src/icd.c:13:6:init_icd 16 static
+../Core/Src/icd.c:137:7:my_abs 16 static
+../Core/Src/icd.c:143:6:mode_start 16 static
+../Core/Src/icd.c:155:6:get_data 32 static
+../Core/Src/icd.c:169:6:get_data_max30003 32 static
+../Core/Src/icd.c:180:6:check_mode_len 16 static
+../Core/Src/icd.c:210:6:check_tres 16 static
+../Core/Src/icd.c:260:6:search_alg 16 static
+../Core/Src/icd.c:397:10:moving_avarage 24 static
+../Core/Src/icd.c:416:6:basket_alg 16 static
+../Core/Src/icd.c:456:6:terapy_start 16 static
+../Core/Src/icd.c:467:6:hv_pwm 16 static
+../Core/Src/icd.c:486:6:hv_sound 16 static
+../Core/Src/icd.c:503:6:hv_charge 32 static
+../Core/Src/icd.c:569:6:hv_shock 16 static
+../Core/Src/icd.c:595:6:quick_analyse 16 static
+../Core/Src/icd.c:635:6:fibr_terapy 16 static
+../Core/Src/icd.c:707:6:terapy_algorithm 16 static
+../Core/Src/icd.c:767:6:relay_all_control 16 static
+../Core/Src/icd.c:774:6:relay_ra_control 16 static
+../Core/Src/icd.c:783:6:relay_rv_control 16 static
+../Core/Src/icd.c:791:6:relay_can_control 16 static
+../Core/Src/icd.c:800:6:hv_ll_control 16 static
+../Core/Src/icd.c:808:6:hv_power 16 static
+../Core/Src/icd.c:823:6:hv_ll_rv_control 16 static
+../Core/Src/icd.c:846:6:hv_ll_scv_control 16 static
+../Core/Src/icd.c:869:6:hv_ll_can_control 16 static
+../Core/Src/icd.c:893:6:hv_discharge 16 static
+../Core/Src/icd.c:908:6:ll_bi_shock_param 24 static
+../Core/Src/icd.c:965:6:ra_lv_control 16 static
+../Core/Src/icd.c:1028:6:rv_lv_control 24 static
+../Core/Src/icd.c:1091:6:hv_en_control 16 static
+../Core/Src/icd.c:1099:6:hv_en_rv 16 static
+../Core/Src/icd.c:1107:6:hv_en_scv 16 static
+../Core/Src/icd.c:1115:6:hv_en_can 16 static
+../Core/Src/icd.c:1123:6:delay_critical 24 static
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.cyclo
index 7f23d50..cb91597 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.cyclo
@@ -1,5 +1,5 @@
../Core/Src/main.c:72:5:main 1
-../Core/Src/main.c:174:6:SystemClock_Config 3
-../Core/Src/main.c:228:6:HAL_TIM_PeriodElapsedCallback 2
-../Core/Src/main.c:245:6:Error_Handler 1
-../Core/Src/main.c:264:6:assert_failed 1
+../Core/Src/main.c:176:6:SystemClock_Config 3
+../Core/Src/main.c:230:6:HAL_TIM_PeriodElapsedCallback 2
+../Core/Src/main.c:247:6:Error_Handler 1
+../Core/Src/main.c:266:6:assert_failed 1
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.o
index ff87fc6..4207cb1 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.su b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.su
index 6209471..4a1a880 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.su
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/main.su
@@ -1,5 +1,5 @@
../Core/Src/main.c:72:5:main 8 static
-../Core/Src/main.c:174:6:SystemClock_Config 88 static
-../Core/Src/main.c:228:6:HAL_TIM_PeriodElapsedCallback 16 static
-../Core/Src/main.c:245:6:Error_Handler 4 static,ignoring_inline_asm
-../Core/Src/main.c:264:6:assert_failed 16 static
+../Core/Src/main.c:176:6:SystemClock_Config 88 static
+../Core/Src/main.c:230:6:HAL_TIM_PeriodElapsedCallback 16 static
+../Core/Src/main.c:247:6:Error_Handler 4 static,ignoring_inline_asm
+../Core/Src/main.c:266:6:assert_failed 16 static
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.cyclo
index dab5be5..53717af 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.cyclo
@@ -7,4 +7,4 @@
../Core/Src/parse.c:48:6:check_uint8 3
../Core/Src/parse.c:57:10:unpackUint32 1
../Core/Src/parse.c:68:6:check_uint32 3
-../Core/Src/parse.c:77:6:parse_command 96
+../Core/Src/parse.c:77:6:parse_command 100
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.o
index 61cb68e..d43b7a6 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/parse.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/stm32f4xx_it.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/stm32f4xx_it.o
index 3064a6a..e83db3a 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/stm32f4xx_it.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/stm32f4xx_it.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.cyclo b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.cyclo
index 68056f3..29cb197 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.cyclo
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.cyclo
@@ -1,10 +1,11 @@
-../Core/Src/tim.c:36:6:MX_TIM1_Init 10
-../Core/Src/tim.c:118:6:MX_TIM2_Init 8
-../Core/Src/tim.c:180:6:MX_TIM3_Init 8
-../Core/Src/tim.c:242:6:MX_TIM4_Init 8
-../Core/Src/tim.c:304:6:MX_TIM6_Init 3
-../Core/Src/tim.c:337:6:MX_TIM9_Init 5
-../Core/Src/tim.c:384:6:MX_TIM14_Init 2
-../Core/Src/tim.c:410:6:HAL_TIM_Base_MspInit 8
-../Core/Src/tim.c:495:6:HAL_TIM_MspPostInit 6
-../Core/Src/tim.c:622:6:HAL_TIM_Base_MspDeInit 8
+../Core/Src/tim.c:37:6:MX_TIM1_Init 10
+../Core/Src/tim.c:119:6:MX_TIM2_Init 8
+../Core/Src/tim.c:181:6:MX_TIM3_Init 8
+../Core/Src/tim.c:243:6:MX_TIM4_Init 8
+../Core/Src/tim.c:305:6:MX_TIM6_Init 3
+../Core/Src/tim.c:338:6:MX_TIM9_Init 5
+../Core/Src/tim.c:385:6:MX_TIM11_Init 5
+../Core/Src/tim.c:430:6:MX_TIM14_Init 2
+../Core/Src/tim.c:456:6:HAL_TIM_Base_MspInit 9
+../Core/Src/tim.c:552:6:HAL_TIM_MspPostInit 7
+../Core/Src/tim.c:700:6:HAL_TIM_Base_MspDeInit 9
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.o
index 3715a01..212ac4c 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.su b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.su
index 391d0a2..ce681d3 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.su
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/tim.su
@@ -1,10 +1,11 @@
-../Core/Src/tim.c:36:6:MX_TIM1_Init 96 static
-../Core/Src/tim.c:118:6:MX_TIM2_Init 64 static
-../Core/Src/tim.c:180:6:MX_TIM3_Init 64 static
-../Core/Src/tim.c:242:6:MX_TIM4_Init 64 static
-../Core/Src/tim.c:304:6:MX_TIM6_Init 16 static
-../Core/Src/tim.c:337:6:MX_TIM9_Init 56 static
-../Core/Src/tim.c:384:6:MX_TIM14_Init 8 static
-../Core/Src/tim.c:410:6:HAL_TIM_Base_MspInit 48 static
-../Core/Src/tim.c:495:6:HAL_TIM_MspPostInit 56 static
-../Core/Src/tim.c:622:6:HAL_TIM_Base_MspDeInit 16 static
+../Core/Src/tim.c:37:6:MX_TIM1_Init 96 static
+../Core/Src/tim.c:119:6:MX_TIM2_Init 64 static
+../Core/Src/tim.c:181:6:MX_TIM3_Init 64 static
+../Core/Src/tim.c:243:6:MX_TIM4_Init 64 static
+../Core/Src/tim.c:305:6:MX_TIM6_Init 16 static
+../Core/Src/tim.c:338:6:MX_TIM9_Init 56 static
+../Core/Src/tim.c:385:6:MX_TIM11_Init 40 static
+../Core/Src/tim.c:430:6:MX_TIM14_Init 8 static
+../Core/Src/tim.c:456:6:HAL_TIM_Base_MspInit 48 static
+../Core/Src/tim.c:552:6:HAL_TIM_MspPostInit 64 static
+../Core/Src/tim.c:700:6:HAL_TIM_Base_MspDeInit 16 static
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/usart.o b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/usart.o
index 8ca3202..fc6dc47 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/usart.o and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/Core/Src/usart.o differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.elf b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.elf
index fdc31e1..14d45de 100644
Binary files a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.elf and b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.elf differ
diff --git a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.list b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.list
index fab46af..2c1d9c0 100644
--- a/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.list
+++ b/2_iteration/v.0.1/firmware/ICD_0.1_100pin_07082025/Debug/ICD_0.1_100pin_07082025.list
@@ -5,47 +5,47 @@ Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001d8 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 0000e3a4 080001e0 080001e0 000011e0 2**4
+ 1 .text 0000e914 080001e0 080001e0 000011e0 2**4
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 00000490 0800e584 0800e584 0000f584 2**2
+ 2 .rodata 00000490 0800eaf4 0800eaf4 0000faf4 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 0800ea14 0800ea14 00010070 2**0
+ 3 .ARM.extab 00000000 0800ef84 0800ef84 00010070 2**0
CONTENTS
- 4 .ARM 00000008 0800ea14 0800ea14 0000fa14 2**2
+ 4 .ARM 00000008 0800ef84 0800ef84 0000ff84 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 5 .preinit_array 00000000 0800ea1c 0800ea1c 00010070 2**0
+ 5 .preinit_array 00000000 0800ef8c 0800ef8c 00010070 2**0
CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000004 0800ea1c 0800ea1c 0000fa1c 2**2
+ 6 .init_array 00000004 0800ef8c 0800ef8c 0000ff8c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 7 .fini_array 00000004 0800ea20 0800ea20 0000fa20 2**2
+ 7 .fini_array 00000004 0800ef90 0800ef90 0000ff90 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 8 .data 00000070 20000000 0800ea24 00010000 2**3
+ 8 .data 00000070 20000000 0800ef94 00010000 2**3
CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 00011148 20000070 0800ea94 00010070 2**2
+ 9 .bss 00011190 20000070 0800f004 00010070 2**2
ALLOC
- 10 ._user_heap_stack 00001e00 200111b8 0800ea94 000101b8 2**0
+ 10 ._user_heap_stack 00001e00 20011200 0800f004 00010200 2**0
ALLOC
11 .ARM.attributes 00000030 00000000 00000000 00010070 2**0
CONTENTS, READONLY
- 12 .debug_info 0001f496 00000000 00000000 000100a0 2**0
+ 12 .debug_info 0001fab7 00000000 00000000 000100a0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00004a99 00000000 00000000 0002f536 2**0
+ 13 .debug_abbrev 00004ab7 00000000 00000000 0002fb57 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 000018a8 00000000 00000000 00033fd0 2**3
+ 14 .debug_aranges 000018b8 00000000 00000000 00034610 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_rnglists 0000130e 00000000 00000000 00035878 2**0
+ 15 .debug_rnglists 0000131c 00000000 00000000 00035ec8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro 000270df 00000000 00000000 00036b86 2**0
+ 16 .debug_macro 000270e5 00000000 00000000 000371e4 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line 000243e9 00000000 00000000 0005dc65 2**0
+ 17 .debug_line 00024537 00000000 00000000 0005e2c9 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str 000e79a1 00000000 00000000 0008204e 2**0
+ 18 .debug_str 000e79e4 00000000 00000000 00082800 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment 00000043 00000000 00000000 001699ef 2**0
+ 19 .comment 00000043 00000000 00000000 0016a1e4 2**0
CONTENTS, READONLY
- 20 .debug_frame 00006bd8 00000000 00000000 00169a34 2**2
+ 20 .debug_frame 00006c28 00000000 00000000 0016a228 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
- 21 .debug_line_str 00000070 00000000 00000000 0017060c 2**0
+ 21 .debug_line_str 00000070 00000000 00000000 00170e50 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
@@ -64,7 +64,7 @@ Disassembly of section .text:
80001f6: bd10 pop {r4, pc}
80001f8: 20000070 .word 0x20000070
80001fc: 00000000 .word 0x00000000
- 8000200: 0800e56c .word 0x0800e56c
+ 8000200: 0800eadc .word 0x0800eadc
08000204 :
8000204: b508 push {r3, lr}
@@ -76,7 +76,7 @@ Disassembly of section .text:
8000212: bd08 pop {r3, pc}
8000214: 00000000 .word 0x00000000
8000218: 20000074 .word 0x20000074
- 800021c: 0800e56c .word 0x0800e56c
+ 800021c: 0800eadc .word 0x0800eadc
08000220 :
8000220: 4603 mov r3, r0
@@ -1325,13 +1325,13 @@ void MX_ADC1_Init(void)
8000fda: 615a str r2, [r3, #20]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8000fdc: 483e ldr r0, [pc, #248] @ (80010d8 )
- 8000fde: f004 fd67 bl 8005ab0
+ 8000fde: f004 fe91 bl 8005d04
8000fe2: 4603 mov r3, r0
8000fe4: 2b00 cmp r3, #0
8000fe6: d001 beq.n 8000fec
{
Error_Handler();
- 8000fe8: f002 f8be bl 8003168
+ 8000fe8: f002 f91a bl 8003220
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1349,13 +1349,13 @@ void MX_ADC1_Init(void)
8000ff8: 463b mov r3, r7
8000ffa: 4619 mov r1, r3
8000ffc: 4836 ldr r0, [pc, #216] @ (80010d8 )
- 8000ffe: f005 f865 bl 80060cc
+ 8000ffe: f005 f98f bl 8006320
8001002: 4603 mov r3, r0
8001004: 2b00 cmp r3, #0
8001006: d001 beq.n 800100c
{
Error_Handler();
- 8001008: f002 f8ae bl 8003168
+ 8001008: f002 f90a bl 8003220
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1370,13 +1370,13 @@ void MX_ADC1_Init(void)
8001014: 463b mov r3, r7
8001016: 4619 mov r1, r3
8001018: 482f ldr r0, [pc, #188] @ (80010d8 )
- 800101a: f005 f857 bl 80060cc
+ 800101a: f005 f981 bl 8006320
800101e: 4603 mov r3, r0
8001020: 2b00 cmp r3, #0
8001022: d001 beq.n 8001028
{
Error_Handler();
- 8001024: f002 f8a0 bl 8003168
+ 8001024: f002 f8fc bl 8003220
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1391,13 +1391,13 @@ void MX_ADC1_Init(void)
8001030: 463b mov r3, r7
8001032: 4619 mov r1, r3
8001034: 4828 ldr r0, [pc, #160] @ (80010d8 )
- 8001036: f005 f849 bl 80060cc
+ 8001036: f005 f973 bl 8006320
800103a: 4603 mov r3, r0
800103c: 2b00 cmp r3, #0
800103e: d001 beq.n 8001044
{
Error_Handler();
- 8001040: f002 f892 bl 8003168
+ 8001040: f002 f8ee bl 8003220
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1412,13 +1412,13 @@ void MX_ADC1_Init(void)
800104c: 463b mov r3, r7
800104e: 4619 mov r1, r3
8001050: 4821 ldr r0, [pc, #132] @ (80010d8 )
- 8001052: f005 f83b bl 80060cc
+ 8001052: f005 f965 bl 8006320
8001056: 4603 mov r3, r0
8001058: 2b00 cmp r3, #0
800105a: d001 beq.n 8001060
{
Error_Handler();
- 800105c: f002 f884 bl 8003168
+ 800105c: f002 f8e0 bl 8003220
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1433,13 +1433,13 @@ void MX_ADC1_Init(void)
8001068: 463b mov r3, r7
800106a: 4619 mov r1, r3
800106c: 481a ldr r0, [pc, #104] @ (80010d8 )
- 800106e: f005 f82d bl 80060cc
+ 800106e: f005 f957 bl 8006320
8001072: 4603 mov r3, r0
8001074: 2b00 cmp r3, #0
8001076: d001 beq.n 800107c
{
Error_Handler();
- 8001078: f002 f876 bl 8003168
+ 8001078: f002 f8d2 bl 8003220
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1454,13 +1454,13 @@ void MX_ADC1_Init(void)
8001084: 463b mov r3, r7
8001086: 4619 mov r1, r3
8001088: 4813 ldr r0, [pc, #76] @ (80010d8 )
- 800108a: f005 f81f bl 80060cc
+ 800108a: f005 f949 bl 8006320
800108e: 4603 mov r3, r0
8001090: 2b00 cmp r3, #0
8001092: d001 beq.n 8001098
{
Error_Handler();
- 8001094: f002 f868 bl 8003168
+ 8001094: f002 f8c4 bl 8003220
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1475,13 +1475,13 @@ void MX_ADC1_Init(void)
80010a0: 463b mov r3, r7
80010a2: 4619 mov r1, r3
80010a4: 480c ldr r0, [pc, #48] @ (80010d8 )
- 80010a6: f005 f811 bl 80060cc
+ 80010a6: f005 f93b bl 8006320
80010aa: 4603 mov r3, r0
80010ac: 2b00 cmp r3, #0
80010ae: d001 beq.n 80010b4
{
Error_Handler();
- 80010b0: f002 f85a bl 8003168
+ 80010b0: f002 f8b6 bl 8003220
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -1496,13 +1496,13 @@ void MX_ADC1_Init(void)
80010bc: 463b mov r3, r7
80010be: 4619 mov r1, r3
80010c0: 4805 ldr r0, [pc, #20] @ (80010d8 )
- 80010c2: f005 f803 bl 80060cc
+ 80010c2: f005 f92d bl 8006320
80010c6: 4603 mov r3, r0
80010c8: 2b00 cmp r3, #0
80010ca: d001 beq.n 80010d0
{
Error_Handler();
- 80010cc: f002 f84c bl 8003168
+ 80010cc: f002 f8a8 bl 8003220
}
/* USER CODE BEGIN ADC1_Init 2 */
@@ -1604,7 +1604,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
8001166: f107 0314 add.w r3, r7, #20
800116a: 4619 mov r1, r3
800116c: 480b ldr r0, [pc, #44] @ (800119c )
- 800116e: f006 f8e5 bl 800733c
+ 800116e: f006 fa0f bl 8007590
GPIO_InitStruct.Pin = RA_ADC_Pin|RV_ADC_Pin|LV_ADC_Pin;
8001172: 2370 movs r3, #112 @ 0x70
@@ -1619,7 +1619,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
800117e: f107 0314 add.w r3, r7, #20
8001182: 4619 mov r1, r3
8001184: 4806 ldr r0, [pc, #24] @ (80011a0 )
- 8001186: f006 f8d9 bl 800733c
+ 8001186: f006 fa03 bl 8007590
/* USER CODE BEGIN ADC1_MspInit 1 */
@@ -1695,161 +1695,161 @@ void adc_read(adc_struct* adc)
80011ec: af00 add r7, sp, #0
80011ee: 6078 str r0, [r7, #4]
adc->error = HAL_ADC_Start(&hadc1);
- 80011f0: 4875 ldr r0, [pc, #468] @ (80013c8 )
- 80011f2: f004 fdbb bl 8005d6c
+ 80011f0: 4874 ldr r0, [pc, #464] @ (80013c4 )
+ 80011f2: f004 fee5 bl 8005fc0
80011f6: 4603 mov r3, r0
80011f8: 461a mov r2, r3
80011fa: 687b ldr r3, [r7, #4]
80011fc: 701a strb r2, [r3, #0]
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
80011fe: 2101 movs r1, #1
- 8001200: 4871 ldr r0, [pc, #452] @ (80013c8 )
- 8001202: f004 fecb bl 8005f9c
+ 8001200: 4870 ldr r0, [pc, #448] @ (80013c4 )
+ 8001202: f004 fff5 bl 80061f0
8001206: 4603 mov r3, r0
8001208: 461a mov r2, r3
800120a: 687b ldr r3, [r7, #4]
800120c: 701a strb r2, [r3, #0]
adc->ecg_1_raw = HAL_ADC_GetValue(&hadc1);//Небольшой псевдо фильтр цифровой K - 0.1
- 800120e: 486e ldr r0, [pc, #440] @ (80013c8 )
- 8001210: f004 ff4f bl 80060b2
+ 800120e: 486d ldr r0, [pc, #436] @ (80013c4 )
+ 8001210: f005 f879 bl 8006306
8001214: 4603 mov r3, r0
8001216: b29a uxth r2, r3
8001218: 687b ldr r3, [r7, #4]
800121a: 805a strh r2, [r3, #2]
adc->error = HAL_ADC_Start(&hadc1);
- 800121c: 486a ldr r0, [pc, #424] @ (80013c8 )
- 800121e: f004 fda5 bl 8005d6c
+ 800121c: 4869 ldr r0, [pc, #420] @ (80013c4 )
+ 800121e: f004 fecf bl 8005fc0
8001222: 4603 mov r3, r0
8001224: 461a mov r2, r3
8001226: 687b ldr r3, [r7, #4]
8001228: 701a strb r2, [r3, #0]
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
800122a: 2101 movs r1, #1
- 800122c: 4866 ldr r0, [pc, #408] @ (80013c8 )
- 800122e: f004 feb5 bl 8005f9c
+ 800122c: 4865 ldr r0, [pc, #404] @ (80013c4 )
+ 800122e: f004 ffdf bl 80061f0
8001232: 4603 mov r3, r0
8001234: 461a mov r2, r3
8001236: 687b ldr r3, [r7, #4]
8001238: 701a strb r2, [r3, #0]
adc->ecg_2_raw = HAL_ADC_GetValue(&hadc1);
- 800123a: 4863 ldr r0, [pc, #396] @ (80013c8 )
- 800123c: f004 ff39 bl 80060b2
+ 800123a: 4862 ldr r0, [pc, #392] @ (80013c4 )
+ 800123c: f005 f863 bl 8006306
8001240: 4603 mov r3, r0
8001242: b29a uxth r2, r3
8001244: 687b ldr r3, [r7, #4]
8001246: 809a strh r2, [r3, #4]
adc->error = HAL_ADC_Start(&hadc1);
- 8001248: 485f ldr r0, [pc, #380] @ (80013c8 )
- 800124a: f004 fd8f bl 8005d6c
+ 8001248: 485e ldr r0, [pc, #376] @ (80013c4 )
+ 800124a: f004 feb9 bl 8005fc0
800124e: 4603 mov r3, r0
8001250: 461a mov r2, r3
8001252: 687b ldr r3, [r7, #4]
8001254: 701a strb r2, [r3, #0]
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
8001256: 2101 movs r1, #1
- 8001258: 485b ldr r0, [pc, #364] @ (80013c8 )
- 800125a: f004 fe9f bl 8005f9c
+ 8001258: 485a ldr r0, [pc, #360] @ (80013c4 )
+ 800125a: f004 ffc9 bl 80061f0
800125e: 4603 mov r3, r0
8001260: 461a mov r2, r3
8001262: 687b ldr r3, [r7, #4]
8001264: 701a strb r2, [r3, #0]
adc->ecg_3_raw = HAL_ADC_GetValue(&hadc1);
- 8001266: 4858 ldr r0, [pc, #352] @ (80013c8 )
- 8001268: f004 ff23 bl 80060b2
+ 8001266: 4857 ldr r0, [pc, #348] @ (80013c4 )
+ 8001268: f005 f84d bl 8006306
800126c: 4603 mov r3, r0
800126e: b29a uxth r2, r3
8001270: 687b ldr r3, [r7, #4]
8001272: 80da strh r2, [r3, #6]
adc->error = HAL_ADC_Start(&hadc1);
- 8001274: 4854 ldr r0, [pc, #336] @ (80013c8 )
- 8001276: f004 fd79 bl 8005d6c
+ 8001274: 4853 ldr r0, [pc, #332] @ (80013c4 )
+ 8001276: f004 fea3 bl 8005fc0
800127a: 4603 mov r3, r0
800127c: 461a mov r2, r3
800127e: 687b ldr r3, [r7, #4]
8001280: 701a strb r2, [r3, #0]
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
8001282: 2101 movs r1, #1
- 8001284: 4850 ldr r0, [pc, #320] @ (80013c8 )
- 8001286: f004 fe89 bl 8005f9c
+ 8001284: 484f ldr r0, [pc, #316] @ (80013c4 )
+ 8001286: f004 ffb3 bl 80061f0
800128a: 4603 mov r3, r0
800128c: 461a mov r2, r3
800128e: 687b ldr r3, [r7, #4]
8001290: 701a strb r2, [r3, #0]
adc->rv_comp_raw = HAL_ADC_GetValue(&hadc1);//Небольшой псевдо фильтр цифровой K - 0.1
- 8001292: 484d ldr r0, [pc, #308] @ (80013c8 )
- 8001294: f004 ff0d bl 80060b2
+ 8001292: 484c ldr r0, [pc, #304] @ (80013c4 )
+ 8001294: f005 f837 bl 8006306
8001298: 4603 mov r3, r0
800129a: b29a uxth r2, r3
800129c: 687b ldr r3, [r7, #4]
800129e: 825a strh r2, [r3, #18]
adc->error = HAL_ADC_Start(&hadc1);
- 80012a0: 4849 ldr r0, [pc, #292] @ (80013c8 )
- 80012a2: f004 fd63 bl 8005d6c
+ 80012a0: 4848 ldr r0, [pc, #288] @ (80013c4 )
+ 80012a2: f004 fe8d bl 8005fc0
80012a6: 4603 mov r3, r0
80012a8: 461a mov r2, r3
80012aa: 687b ldr r3, [r7, #4]
80012ac: 701a strb r2, [r3, #0]
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
80012ae: 2101 movs r1, #1
- 80012b0: 4845 ldr r0, [pc, #276] @ (80013c8 )
- 80012b2: f004 fe73 bl 8005f9c
+ 80012b0: 4844 ldr r0, [pc, #272] @ (80013c4 )
+ 80012b2: f004 ff9d bl 80061f0
80012b6: 4603 mov r3, r0
80012b8: 461a mov r2, r3
80012ba: 687b ldr r3, [r7, #4]
80012bc: 701a strb r2, [r3, #0]
adc->ra_comp_raw = HAL_ADC_GetValue(&hadc1);
- 80012be: 4842 ldr r0, [pc, #264] @ (80013c8 )
- 80012c0: f004 fef7 bl 80060b2
+ 80012be: 4841 ldr r0, [pc, #260] @ (80013c4 )
+ 80012c0: f005 f821 bl 8006306
80012c4: 4603 mov r3, r0
80012c6: b29a uxth r2, r3
80012c8: 687b ldr r3, [r7, #4]
80012ca: 829a strh r2, [r3, #20]
adc->error = HAL_ADC_Start(&hadc1);
- 80012cc: 483e ldr r0, [pc, #248] @ (80013c8 )
- 80012ce: f004 fd4d bl 8005d6c
+ 80012cc: 483d ldr r0, [pc, #244] @ (80013c4 )
+ 80012ce: f004 fe77 bl 8005fc0
80012d2: 4603 mov r3, r0
80012d4: 461a mov r2, r3
80012d6: 687b ldr r3, [r7, #4]
80012d8: 701a strb r2, [r3, #0]
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
80012da: 2101 movs r1, #1
- 80012dc: 483a ldr r0, [pc, #232] @ (80013c8 )
- 80012de: f004 fe5d bl 8005f9c
+ 80012dc: 4839 ldr r0, [pc, #228] @ (80013c4 )
+ 80012de: f004 ff87 bl 80061f0
80012e2: 4603 mov r3, r0
80012e4: 461a mov r2, r3
80012e6: 687b ldr r3, [r7, #4]
80012e8: 701a strb r2, [r3, #0]
adc->lv_comp_raw = HAL_ADC_GetValue(&hadc1);
- 80012ea: 4837 ldr r0, [pc, #220] @ (80013c8 )
- 80012ec: f004 fee1 bl 80060b2
+ 80012ea: 4836 ldr r0, [pc, #216] @ (80013c4 )
+ 80012ec: f005 f80b bl 8006306
80012f0: 4603 mov r3, r0
80012f2: b29a uxth r2, r3
80012f4: 687b ldr r3, [r7, #4]
80012f6: 82da strh r2, [r3, #22]
adc->error = HAL_ADC_Start(&hadc1);
- 80012f8: 4833 ldr r0, [pc, #204] @ (80013c8 )
- 80012fa: f004 fd37 bl 8005d6c
+ 80012f8: 4832 ldr r0, [pc, #200] @ (80013c4 )
+ 80012fa: f004 fe61 bl 8005fc0
80012fe: 4603 mov r3, r0
8001300: 461a mov r2, r3
8001302: 687b ldr r3, [r7, #4]
8001304: 701a strb r2, [r3, #0]
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
8001306: 2101 movs r1, #1
- 8001308: 482f ldr r0, [pc, #188] @ (80013c8 )
- 800130a: f004 fe47 bl 8005f9c
+ 8001308: 482e ldr r0, [pc, #184] @ (80013c4 )
+ 800130a: f004 ff71 bl 80061f0
800130e: 4603 mov r3, r0
8001310: 461a mov r2, r3
8001312: 687b ldr r3, [r7, #4]
8001314: 701a strb r2, [r3, #0]
adc->hv_raw = HAL_ADC_GetValue(&hadc1);
- 8001316: 482c ldr r0, [pc, #176] @ (80013c8 )
- 8001318: f004 fecb bl 80060b2
+ 8001316: 482b ldr r0, [pc, #172] @ (80013c4 )
+ 8001318: f004 fff5 bl 8006306
800131c: 4603 mov r3, r0
800131e: b29a uxth r2, r3
8001320: 687b ldr r3, [r7, #4]
@@ -1860,7 +1860,7 @@ void adc_read(adc_struct* adc)
8001328: 461a mov r2, r3
800132a: f242 53e4 movw r3, #9700 @ 0x25e4
800132e: fb03 f202 mul.w r2, r3, r2
- 8001332: 4b26 ldr r3, [pc, #152] @ (80013cc )
+ 8001332: 4b25 ldr r3, [pc, #148] @ (80013c8 )
8001334: fba3 1302 umull r1, r3, r3, r2
8001338: 1ad2 subs r2, r2, r3
800133a: 0852 lsrs r2, r2, #1
@@ -1871,32896 +1871,33745 @@ void adc_read(adc_struct* adc)
8001344: 821a strh r2, [r3, #16]
adc->error = HAL_ADC_Start(&hadc1);
- 8001346: 4820 ldr r0, [pc, #128] @ (80013c8 )
- 8001348: f004 fd10 bl 8005d6c
+ 8001346: 481f ldr r0, [pc, #124] @ (80013c4 )
+ 8001348: f004 fe3a bl 8005fc0
800134c: 4603 mov r3, r0
800134e: 461a mov r2, r3
8001350: 687b ldr r3, [r7, #4]
8001352: 701a strb r2, [r3, #0]
adc->error = HAL_ADC_PollForConversion(&hadc1, 1);
8001354: 2101 movs r1, #1
- 8001356: 481c ldr r0, [pc, #112] @ (80013c8 )
- 8001358: f004 fe20 bl 8005f9c
+ 8001356: 481b ldr r0, [pc, #108] @ (80013c4 )
+ 8001358: f004 ff4a bl 80061f0
800135c: 4603 mov r3, r0
800135e: 461a mov r2, r3
8001360: 687b ldr r3, [r7, #4]
8001362: 701a strb r2, [r3, #0]
adc->bat_raw = HAL_ADC_GetValue(&hadc1);
- 8001364: 4818 ldr r0, [pc, #96] @ (80013c8 )
- 8001366: f004 fea4 bl 80060b2
+ 8001364: 4817 ldr r0, [pc, #92] @ (80013c4 )
+ 8001366: f004 ffce bl 8006306
800136a: 4603 mov r3, r0
800136c: b29a uxth r2, r3
800136e: 687b ldr r3, [r7, #4]
8001370: 811a strh r2, [r3, #8]
- adc->bat_volt = ((uint32_t)(adc->bat_raw) * 6600)/4095 + 40;//40 миливольт падение на идеальном диоде
+ adc->bat_volt = ((uint32_t)(adc->bat_raw) * 6600)/4095;
8001372: 687b ldr r3, [r7, #4]
8001374: 891b ldrh r3, [r3, #8]
8001376: 461a mov r2, r3
8001378: f641 13c8 movw r3, #6600 @ 0x19c8
800137c: fb03 f202 mul.w r2, r3, r2
- 8001380: 4b12 ldr r3, [pc, #72] @ (80013cc )
+ 8001380: 4b11 ldr r3, [pc, #68] @ (80013c8 )
8001382: fba3 1302 umull r1, r3, r3, r2
8001386: 1ad2 subs r2, r2, r3
8001388: 0852 lsrs r2, r2, #1
800138a: 4413 add r3, r2
800138c: 0adb lsrs r3, r3, #11
- 800138e: b29b uxth r3, r3
- 8001390: 3328 adds r3, #40 @ 0x28
- 8001392: b29a uxth r2, r3
- 8001394: 687b ldr r3, [r7, #4]
- 8001396: 815a strh r2, [r3, #10]
+ 800138e: b29a uxth r2, r3
+ 8001390: 687b ldr r3, [r7, #4]
+ 8001392: 815a strh r2, [r3, #10]
adc->bat_pers = volt_to_pers(adc->bat_volt);//40 миливольт падение на идеальном диоде
- 8001398: 687b ldr r3, [r7, #4]
- 800139a: 895b ldrh r3, [r3, #10]
- 800139c: 4618 mov r0, r3
- 800139e: f7ff ff01 bl 80011a4
- 80013a2: 4603 mov r3, r0
- 80013a4: 461a mov r2, r3
- 80013a6: 687b ldr r3, [r7, #4]
- 80013a8: 731a strb r2, [r3, #12]
+ 8001394: 687b ldr r3, [r7, #4]
+ 8001396: 895b ldrh r3, [r3, #10]
+ 8001398: 4618 mov r0, r3
+ 800139a: f7ff ff03 bl 80011a4
+ 800139e: 4603 mov r3, r0
+ 80013a0: 461a mov r2, r3
+ 80013a2: 687b ldr r3, [r7, #4]
+ 80013a4: 731a strb r2, [r3, #12]
adc->error = HAL_ADC_Stop(&hadc1);
- 80013aa: 4807 ldr r0, [pc, #28] @ (80013c8 )
- 80013ac: f004 fdb6 bl 8005f1c
- 80013b0: 4603 mov r3, r0
- 80013b2: 461a mov r2, r3
- 80013b4: 687b ldr r3, [r7, #4]
- 80013b6: 701a strb r2, [r3, #0]
+ 80013a6: 4807 ldr r0, [pc, #28] @ (80013c4 )
+ 80013a8: f004 fee2 bl 8006170
+ 80013ac: 4603 mov r3, r0
+ 80013ae: 461a mov r2, r3
+ 80013b0: 687b ldr r3, [r7, #4]
+ 80013b2: 701a strb r2, [r3, #0]
adc->drdy_trigger = true;
- 80013b8: 687b ldr r3, [r7, #4]
- 80013ba: 2201 movs r2, #1
- 80013bc: 761a strb r2, [r3, #24]
+ 80013b4: 687b ldr r3, [r7, #4]
+ 80013b6: 2201 movs r2, #1
+ 80013b8: 761a strb r2, [r3, #24]
}
- 80013be: bf00 nop
- 80013c0: 3708 adds r7, #8
- 80013c2: 46bd mov sp, r7
- 80013c4: bd80 pop {r7, pc}
- 80013c6: bf00 nop
- 80013c8: 200000a8 .word 0x200000a8
- 80013cc: 00100101 .word 0x00100101
+ 80013ba: bf00 nop
+ 80013bc: 3708 adds r7, #8
+ 80013be: 46bd mov sp, r7
+ 80013c0: bd80 pop {r7, pc}
+ 80013c2: bf00 nop
+ 80013c4: 200000a8 .word 0x200000a8
+ 80013c8: 00100101 .word 0x00100101
-080013d0 :
+080013cc :
#include "control.h"
ctrl_struct Control; //FLASH (rx)
void control_init(void)
{
- 80013d0: b480 push {r7}
- 80013d2: af00 add r7, sp, #0
+ 80013cc: b480 push {r7}
+ 80013ce: af00 add r7, sp, #0
Control.dev_type = DEV_TYPE;
- 80013d4: 4b12 ldr r3, [pc, #72] @ (8001420 )
- 80013d6: 2201 movs r2, #1
- 80013d8: 771a strb r2, [r3, #28]
+ 80013d0: 4b12 ldr r3, [pc, #72] @ (800141c )
+ 80013d2: 2201 movs r2, #1
+ 80013d4: 771a strb r2, [r3, #28]
Control.ble_mode_set = ble_raw;
- 80013da: 4b11 ldr r3, [pc, #68] @ (8001420 )
- 80013dc: 2201 movs r2, #1
- 80013de: 769a strb r2, [r3, #26]
+ 80013d6: 4b11 ldr r3, [pc, #68] @ (800141c )
+ 80013d8: 2201 movs r2, #1
+ 80013da: 769a strb r2, [r3, #26]
Control.ble_mode_now = ble_off;
- 80013e0: 4b0f ldr r3, [pc, #60] @ (8001420 )
- 80013e2: 2200 movs r2, #0
- 80013e4: 76da strb r2, [r3, #27]
+ 80013dc: 4b0f ldr r3, [pc, #60] @ (800141c )
+ 80013de: 2200 movs r2, #0
+ 80013e0: 76da strb r2, [r3, #27]
Control.serial_number = BASE_SERIAL_NUM;
- 80013e6: 4b0e ldr r3, [pc, #56] @ (8001420 )
- 80013e8: f244 0201 movw r2, #16385 @ 0x4001
- 80013ec: 621a str r2, [r3, #32]
+ 80013e2: 4b0e ldr r3, [pc, #56] @ (800141c )
+ 80013e4: f244 0201 movw r2, #16385 @ 0x4001
+ 80013e8: 621a str r2, [r3, #32]
Control.password = BASE_PASSWORD;
- 80013ee: 4b0c ldr r3, [pc, #48] @ (8001420 )
- 80013f0: 4a0c ldr r2, [pc, #48] @ (8001424 )
- 80013f2: 625a str r2, [r3, #36] @ 0x24
+ 80013ea: 4b0c ldr r3, [pc, #48] @ (800141c )
+ 80013ec: 4a0c ldr r2, [pc, #48] @ (8001420 )
+ 80013ee: 625a str r2, [r3, #36] @ 0x24
Control.mesh_netid = BASE_MESH_ID;
- 80013f4: 4b0a ldr r3, [pc, #40] @ (8001420 )
- 80013f6: f241 3213 movw r2, #4883 @ 0x1313
- 80013fa: 629a str r2, [r3, #40] @ 0x28
+ 80013f0: 4b0a ldr r3, [pc, #40] @ (800141c )
+ 80013f2: f241 3213 movw r2, #4883 @ 0x1313
+ 80013f6: 629a str r2, [r3, #40] @ 0x28
Control.mesh_adr = BASE_MESH_ADR;
- 80013fc: 4b08 ldr r3, [pc, #32] @ (8001420 )
- 80013fe: f244 0201 movw r2, #16385 @ 0x4001
- 8001402: 62da str r2, [r3, #44] @ 0x2c
+ 80013f8: 4b08 ldr r3, [pc, #32] @ (800141c )
+ 80013fa: f244 0201 movw r2, #16385 @ 0x4001
+ 80013fe: 62da str r2, [r3, #44] @ 0x2c
Control.master_adr = BASE_MASTER_ADR;
- 8001404: 4b06 ldr r3, [pc, #24] @ (8001420 )
- 8001406: f241 0201 movw r2, #4097 @ 0x1001
- 800140a: 631a str r2, [r3, #48] @ 0x30
+ 8001400: 4b06 ldr r3, [pc, #24] @ (800141c )
+ 8001402: f241 0201 movw r2, #4097 @ 0x1001
+ 8001406: 631a str r2, [r3, #48] @ 0x30
Control.ble_ask = false;
- 800140c: 4b04 ldr r3, [pc, #16] @ (8001420 )
- 800140e: 2200 movs r2, #0
- 8001410: f883 2034 strb.w r2, [r3, #52] @ 0x34
+ 8001408: 4b04 ldr r3, [pc, #16] @ (800141c )
+ 800140a: 2200 movs r2, #0
+ 800140c: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
- 8001414: bf00 nop
- 8001416: 46bd mov sp, r7
- 8001418: f85d 7b04 ldr.w r7, [sp], #4
- 800141c: 4770 bx lr
- 800141e: bf00 nop
- 8001420: 200000f0 .word 0x200000f0
- 8001424: 000bde31 .word 0x000bde31
+ 8001410: bf00 nop
+ 8001412: 46bd mov sp, r7
+ 8001414: f85d 7b04 ldr.w r7, [sp], #4
+ 8001418: 4770 bx lr
+ 800141a: bf00 nop
+ 800141c: 200000f0 .word 0x200000f0
+ 8001420: 000bde31 .word 0x000bde31
-08001428 :
+08001424 :
control->ble_ask = false;
}
void lets_sleep(void)
{
- 8001428: b580 push {r7, lr}
- 800142a: af00 add r7, sp, #0
+ 8001424: b580 push {r7, lr}
+ 8001426: af00 add r7, sp, #0
//Выключили питание АЦП
HAL_GPIO_WritePin(INA_PWR_GPIO_Port, INA_PWR_Pin, RESET);
- 800142c: 2200 movs r2, #0
- 800142e: 2180 movs r1, #128 @ 0x80
- 8001430: 4810 ldr r0, [pc, #64] @ (8001474 )
- 8001432: f006 f9e7 bl 8007804
+ 8001428: 2200 movs r2, #0
+ 800142a: 2180 movs r1, #128 @ 0x80
+ 800142c: 4810 ldr r0, [pc, #64] @ (8001470 )
+ 800142e: f006 fb13 bl 8007a58
//Выключили питание потенциометра
HAL_GPIO_WritePin(POT_PWR_GPIO_Port, POT_PWR_Pin, GPIO_PIN_RESET);
- 8001436: 2200 movs r2, #0
- 8001438: f44f 4180 mov.w r1, #16384 @ 0x4000
- 800143c: 480e ldr r0, [pc, #56] @ (8001478 )
- 800143e: f006 f9e1 bl 8007804
+ 8001432: 2200 movs r2, #0
+ 8001434: f44f 4180 mov.w r1, #16384 @ 0x4000
+ 8001438: 480e ldr r0, [pc, #56] @ (8001474 )
+ 800143a: f006 fb0d bl 8007a58
HAL_GPIO_WritePin(BLE_PWR_GPIO_Port, BLE_PWR_Pin, SET);
- 8001442: 2201 movs r2, #1
- 8001444: f44f 5180 mov.w r1, #4096 @ 0x1000
- 8001448: 480c ldr r0, [pc, #48] @ (800147c )
- 800144a: f006 f9db bl 8007804
+ 800143e: 2201 movs r2, #1
+ 8001440: f44f 5180 mov.w r1, #4096 @ 0x1000
+ 8001444: 480c ldr r0, [pc, #48] @ (8001478 )
+ 8001446: f006 fb07 bl 8007a58
+// hv_power(false);
+// hv_ll_control(z_state, z_state, z_state);
+// HAL_Delay(20);
+// relay_all_control(false, false, false);
HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN1);
- 800144e: f44f 7080 mov.w r0, #256 @ 0x100
- 8001452: f006 fa25 bl 80078a0
+ 800144a: f44f 7080 mov.w r0, #256 @ 0x100
+ 800144e: f006 fb51 bl 8007af4
//Сейчас второй кнопки нет!!
//HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN2);//если вторая кнопка тоже подключена PC0
__HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU);
- 8001456: 4b0a ldr r3, [pc, #40] @ (8001480 )
- 8001458: 681b ldr r3, [r3, #0]
- 800145a: 4a09 ldr r2, [pc, #36] @ (8001480 )
- 800145c: f043 0304 orr.w r3, r3, #4
- 8001460: 6013 str r3, [r2, #0]
+ 8001452: 4b0a ldr r3, [pc, #40] @ (800147c )
+ 8001454: 681b ldr r3, [r3, #0]
+ 8001456: 4a09 ldr r2, [pc, #36] @ (800147c )
+ 8001458: f043 0304 orr.w r3, r3, #4
+ 800145c: 6013 str r3, [r2, #0]
HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN1);
- 8001462: f44f 7080 mov.w r0, #256 @ 0x100
- 8001466: f006 f9f9 bl 800785c
+ 800145e: f44f 7080 mov.w r0, #256 @ 0x100
+ 8001462: f006 fb25 bl 8007ab0
HAL_PWR_EnterSTANDBYMode();
- 800146a: f006 fa3b bl 80078e4
+ 8001466: f006 fb67 bl 8007b38
}
+ 800146a: bf00 nop
+ 800146c: bd80 pop {r7, pc}
800146e: bf00 nop
- 8001470: bd80 pop {r7, pc}
- 8001472: bf00 nop
- 8001474: 40021000 .word 0x40021000
- 8001478: 40020400 .word 0x40020400
- 800147c: 40020000 .word 0x40020000
- 8001480: 40007000 .word 0x40007000
+ 8001470: 40021000 .word 0x40021000
+ 8001474: 40020400 .word 0x40020400
+ 8001478: 40020000 .word 0x40020000
+ 800147c: 40007000 .word 0x40007000
-08001484 :
+08001480 :
//===============================================================
// Задержка времени в мкс
//===============================================================
void delay_us(unsigned int t)
{
- 8001484: b480 push {r7}
- 8001486: b085 sub sp, #20
- 8001488: af00 add r7, sp, #0
- 800148a: 6078 str r0, [r7, #4]
+ 8001480: b480 push {r7}
+ 8001482: b085 sub sp, #20
+ 8001484: af00 add r7, sp, #0
+ 8001486: 6078 str r0, [r7, #4]
unsigned long i;
i = t*SYSCLK;
- 800148c: 687a ldr r2, [r7, #4]
- 800148e: 4613 mov r3, r2
- 8001490: 005b lsls r3, r3, #1
- 8001492: 4413 add r3, r2
- 8001494: 00db lsls r3, r3, #3
- 8001496: 60fb str r3, [r7, #12]
+ 8001488: 687a ldr r2, [r7, #4]
+ 800148a: 4613 mov r3, r2
+ 800148c: 005b lsls r3, r3, #1
+ 800148e: 4413 add r3, r2
+ 8001490: 00db lsls r3, r3, #3
+ 8001492: 60fb str r3, [r7, #12]
while(i--);
- 8001498: bf00 nop
- 800149a: 68fb ldr r3, [r7, #12]
- 800149c: 1e5a subs r2, r3, #1
- 800149e: 60fa str r2, [r7, #12]
- 80014a0: 2b00 cmp r3, #0
- 80014a2: d1fa bne.n 800149a
+ 8001494: bf00 nop
+ 8001496: 68fb ldr r3, [r7, #12]
+ 8001498: 1e5a subs r2, r3, #1
+ 800149a: 60fa str r2, [r7, #12]
+ 800149c: 2b00 cmp r3, #0
+ 800149e: d1fa bne.n 8001496
}
- 80014a4: bf00 nop
- 80014a6: bf00 nop
- 80014a8: 3714 adds r7, #20
- 80014aa: 46bd mov sp, r7
- 80014ac: f85d 7b04 ldr.w r7, [sp], #4
- 80014b0: 4770 bx lr
+ 80014a0: bf00 nop
+ 80014a2: bf00 nop
+ 80014a4: 3714 adds r7, #20
+ 80014a6: 46bd mov sp, r7
+ 80014a8: f85d 7b04 ldr.w r7, [sp], #4
+ 80014ac: 4770 bx lr
...
-080014b4 :
+080014b0 :
/**
* Enable DMA controller clock
*/
void MX_DMA_Init(void)
{
- 80014b4: b580 push {r7, lr}
- 80014b6: b082 sub sp, #8
- 80014b8: af00 add r7, sp, #0
+ 80014b0: b580 push {r7, lr}
+ 80014b2: b082 sub sp, #8
+ 80014b4: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();
- 80014ba: 2300 movs r3, #0
- 80014bc: 607b str r3, [r7, #4]
- 80014be: 4b10 ldr r3, [pc, #64] @ (8001500 )
- 80014c0: 6b1b ldr r3, [r3, #48] @ 0x30
- 80014c2: 4a0f ldr r2, [pc, #60] @ (8001500 )
- 80014c4: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
- 80014c8: 6313 str r3, [r2, #48] @ 0x30
- 80014ca: 4b0d ldr r3, [pc, #52] @ (8001500 )
- 80014cc: 6b1b ldr r3, [r3, #48] @ 0x30
- 80014ce: f403 0380 and.w r3, r3, #4194304 @ 0x400000
- 80014d2: 607b str r3, [r7, #4]
- 80014d4: 687b ldr r3, [r7, #4]
+ 80014b6: 2300 movs r3, #0
+ 80014b8: 607b str r3, [r7, #4]
+ 80014ba: 4b10 ldr r3, [pc, #64] @ (80014fc )
+ 80014bc: 6b1b ldr r3, [r3, #48] @ 0x30
+ 80014be: 4a0f ldr r2, [pc, #60] @ (80014fc )
+ 80014c0: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
+ 80014c4: 6313 str r3, [r2, #48] @ 0x30
+ 80014c6: 4b0d ldr r3, [pc, #52] @ (80014fc )
+ 80014c8: 6b1b ldr r3, [r3, #48] @ 0x30
+ 80014ca: f403 0380 and.w r3, r3, #4194304 @ 0x400000
+ 80014ce: 607b str r3, [r7, #4]
+ 80014d0: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA2_Stream2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 5, 0);
- 80014d6: 2200 movs r2, #0
- 80014d8: 2105 movs r1, #5
- 80014da: 203a movs r0, #58 @ 0x3a
- 80014dc: f005 f944 bl 8006768
+ 80014d2: 2200 movs r2, #0
+ 80014d4: 2105 movs r1, #5
+ 80014d6: 203a movs r0, #58 @ 0x3a
+ 80014d8: f005 fa70 bl 80069bc
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
- 80014e0: 203a movs r0, #58 @ 0x3a
- 80014e2: f005 f96d bl 80067c0
+ 80014dc: 203a movs r0, #58 @ 0x3a
+ 80014de: f005 fa99 bl 8006a14
/* DMA2_Stream7_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
- 80014e6: 2200 movs r2, #0
- 80014e8: 2105 movs r1, #5
- 80014ea: 2046 movs r0, #70 @ 0x46
- 80014ec: f005 f93c bl 8006768
+ 80014e2: 2200 movs r2, #0
+ 80014e4: 2105 movs r1, #5
+ 80014e6: 2046 movs r0, #70 @ 0x46
+ 80014e8: f005 fa68 bl 80069bc
HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
- 80014f0: 2046 movs r0, #70 @ 0x46
- 80014f2: f005 f965 bl 80067c0
+ 80014ec: 2046 movs r0, #70 @ 0x46
+ 80014ee: f005 fa91 bl 8006a14
}
- 80014f6: bf00 nop
- 80014f8: 3708 adds r7, #8
- 80014fa: 46bd mov sp, r7
- 80014fc: bd80 pop {r7, pc}
- 80014fe: bf00 nop
- 8001500: 40023800 .word 0x40023800
+ 80014f2: bf00 nop
+ 80014f4: 3708 adds r7, #8
+ 80014f6: 46bd mov sp, r7
+ 80014f8: bd80 pop {r7, pc}
+ 80014fa: bf00 nop
+ 80014fc: 40023800 .word 0x40023800
-08001504 :
+08001500 :
return y[0];
}
#define NCoef_lp 4
float iir_lp30(float NewSample) {
- 8001504: b4b0 push {r4, r5, r7}
- 8001506: b08f sub sp, #60 @ 0x3c
- 8001508: af00 add r7, sp, #0
- 800150a: ed87 0a01 vstr s0, [r7, #4]
+ 8001500: b4b0 push {r4, r5, r7}
+ 8001502: b08f sub sp, #60 @ 0x3c
+ 8001504: af00 add r7, sp, #0
+ 8001506: ed87 0a01 vstr s0, [r7, #4]
float ACoef[NCoef_lp+1] = {
- 800150e: 4b3b ldr r3, [pc, #236] @ (80015fc )
- 8001510: f107 0420 add.w r4, r7, #32
- 8001514: 461d mov r5, r3
- 8001516: cd0f ldmia r5!, {r0, r1, r2, r3}
- 8001518: c40f stmia r4!, {r0, r1, r2, r3}
- 800151a: 682b ldr r3, [r5, #0]
- 800151c: 6023 str r3, [r4, #0]
+ 800150a: 4b3b ldr r3, [pc, #236] @ (80015f8 )
+ 800150c: f107 0420 add.w r4, r7, #32
+ 8001510: 461d mov r5, r3
+ 8001512: cd0f ldmia r5!, {r0, r1, r2, r3}
+ 8001514: c40f stmia r4!, {r0, r1, r2, r3}
+ 8001516: 682b ldr r3, [r5, #0]
+ 8001518: 6023 str r3, [r4, #0]
0.11138063027330414000,
0.07425375351553609200,
0.01856343837888402300
};
float BCoef[NCoef_lp+1] = {
- 800151e: 4b38 ldr r3, [pc, #224] @ (8001600 )
- 8001520: f107 040c add.w r4, r7, #12
- 8001524: 461d mov r5, r3
- 8001526: cd0f ldmia r5!, {r0, r1, r2, r3}
- 8001528: c40f stmia r4!, {r0, r1, r2, r3}
- 800152a: 682b ldr r3, [r5, #0]
- 800152c: 6023 str r3, [r4, #0]
+ 800151a: 4b38 ldr r3, [pc, #224] @ (80015fc )
+ 800151c: f107 040c add.w r4, r7, #12
+ 8001520: 461d mov r5, r3
+ 8001522: cd0f ldmia r5!, {r0, r1, r2, r3}
+ 8001524: c40f stmia r4!, {r0, r1, r2, r3}
+ 8001526: 682b ldr r3, [r5, #0]
+ 8001528: 6023 str r3, [r4, #0]
static float y[NCoef_lp+1]; //output samples
static float x[NCoef_lp+1]; //input samples
int n;
//shift the old samples
for(n=NCoef_lp; n>0; n--) {
- 800152e: 2304 movs r3, #4
- 8001530: 637b str r3, [r7, #52] @ 0x34
- 8001532: e018 b.n 8001566
+ 800152a: 2304 movs r3, #4
+ 800152c: 637b str r3, [r7, #52] @ 0x34
+ 800152e: e018 b.n 8001562
x[n] = x[n-1];
- 8001534: 6b7b ldr r3, [r7, #52] @ 0x34
- 8001536: 3b01 subs r3, #1
- 8001538: 4a32 ldr r2, [pc, #200] @ (8001604 )
- 800153a: 009b lsls r3, r3, #2
- 800153c: 4413 add r3, r2
- 800153e: 681a ldr r2, [r3, #0]
- 8001540: 4930 ldr r1, [pc, #192] @ (8001604 )
- 8001542: 6b7b ldr r3, [r7, #52] @ 0x34
- 8001544: 009b lsls r3, r3, #2
- 8001546: 440b add r3, r1
- 8001548: 601a str r2, [r3, #0]
+ 8001530: 6b7b ldr r3, [r7, #52] @ 0x34
+ 8001532: 3b01 subs r3, #1
+ 8001534: 4a32 ldr r2, [pc, #200] @ (8001600 )
+ 8001536: 009b lsls r3, r3, #2
+ 8001538: 4413 add r3, r2
+ 800153a: 681a ldr r2, [r3, #0]
+ 800153c: 4930 ldr r1, [pc, #192] @ (8001600 )
+ 800153e: 6b7b ldr r3, [r7, #52] @ 0x34
+ 8001540: 009b lsls r3, r3, #2
+ 8001542: 440b add r3, r1
+ 8001544: 601a str r2, [r3, #0]
y[n] = y[n-1];
- 800154a: 6b7b ldr r3, [r7, #52] @ 0x34
- 800154c: 3b01 subs r3, #1
- 800154e: 4a2e ldr r2, [pc, #184] @ (8001608 )
- 8001550: 009b lsls r3, r3, #2
- 8001552: 4413 add r3, r2
- 8001554: 681a ldr r2, [r3, #0]
- 8001556: 492c ldr r1, [pc, #176] @ (8001608 )
- 8001558: 6b7b ldr r3, [r7, #52] @ 0x34
- 800155a: 009b lsls r3, r3, #2
- 800155c: 440b add r3, r1
- 800155e: 601a str r2, [r3, #0]
+ 8001546: 6b7b ldr r3, [r7, #52] @ 0x34
+ 8001548: 3b01 subs r3, #1
+ 800154a: 4a2e ldr r2, [pc, #184] @ (8001604 )
+ 800154c: 009b lsls r3, r3, #2
+ 800154e: 4413 add r3, r2
+ 8001550: 681a ldr r2, [r3, #0]
+ 8001552: 492c ldr r1, [pc, #176] @ (8001604 )
+ 8001554: 6b7b ldr r3, [r7, #52] @ 0x34
+ 8001556: 009b lsls r3, r3, #2
+ 8001558: 440b add r3, r1
+ 800155a: 601a str r2, [r3, #0]
for(n=NCoef_lp; n>0; n--) {
- 8001560: 6b7b ldr r3, [r7, #52] @ 0x34
- 8001562: 3b01 subs r3, #1
- 8001564: 637b str r3, [r7, #52] @ 0x34
- 8001566: 6b7b ldr r3, [r7, #52] @ 0x34
- 8001568: 2b00 cmp r3, #0
- 800156a: dce3 bgt.n 8001534